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authorDamien Lespiau <damien.lespiau@intel.com>2012-10-29 15:24:49 +0000
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-11 23:51:04 +0100
commit14f86147a90cb47db7ccfd90bf14f830fb34fba9 (patch)
tree902659c1d8ca95956f1de0a35f79b7366647d718 /drivers/gpu/drm/i915/intel_pm.c
parent4358a3748c39de3e66b6dc260af7a5ef785e120b (diff)
downloadolio-linux-3.10-14f86147a90cb47db7ccfd90bf14f830fb34fba9.tar.xz
olio-linux-3.10-14f86147a90cb47db7ccfd90bf14f830fb34fba9.zip
drm/i915: Flush using only the correct base address register
We were writing DSP_ADDR and DSP_SURF unconditionally. This did not trigger an unclaimed write before HSW as the address of DSP_ADDR has been repurposed as DSP_LINOFF. On HSW, though, DSP_LINOFF has been removed and then writting to it triggers an unclaimed write. This patch writes to DSP_ADDR or DSP_SURF to flush the display plane configuration depending on the gen we're running on. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
0 files changed, 0 insertions, 0 deletions