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/*
* (C) Copyright 2004-2011
* Texas Instruments, <www.ti.com>
*
* Author :
* Sunil Kumar <sunilsaini05@gmail.com>
* Shashi Ranjan <shashiranjanmca05@gmail.com>
*
* Derived from Beagle Board and 3430 SDP code by
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/errno.h>
#include "h1.h"
#include <command.h>
#include <power/tps65910.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_H1;
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
return 0;
}
#ifdef CONFIG_SPL_BUILD
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
* so we have to setup the DDR timings ourself on both banks.
*/
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
int pop_mfr, pop_id;
/*
* We need to identify what PoP memory is on the board so that
* we know what timings to use. If we can't identify it then
* we know it's an xM. To map the ID values please see nand_ids.c
*/
identify_nand_chip(&pop_mfr, &pop_id);
timings->mr = MICRON_V_MR_165;
/* 128MB DDR */
timings->mcfg = MICRON_V_MCFG_200(256 << 20);
timings->ctrla = MICRON_V_ACTIMA_200;
timings->ctrlb = MICRON_V_ACTIMB_200;
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
}
#endif
#define TPS65910_VMMC_REG 0x35
static int disp_regulator_init(void)
{
uchar buf;
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return -1;
/* Tell the TPS65910 to use i2c */
tps65910_set_i2c_control();
/* SEL[1:0] = 3.3 V, ST[1:0] = On high power (ACTIVE) */
buf = 0x0d;
/* set VMMC_REG to supply 3.3 V */
return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_VMMC_REG, 1, &buf, 1);
}
#define TPS65910_VDIG1_REG 0x30
static int accel_regulator_init(void)
{
uchar buf;
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return -1;
/* Tell the TPS65910 to use i2c */
tps65910_set_i2c_control();
/* SEL[1:0] = 1.8 V, ST[1:0] = On high power (ACTIVE) */
buf = 0x09;
/* set VDIG1_REG to supply 1.8 V */
return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_VDIG1_REG, 1, &buf, 1);
}
/*
* Routine: misc_init_r
* Description: Configure board specific parts
*/
int misc_init_r(void)
{
struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
if (disp_regulator_init())
puts("failed to set VMMC regulator for tps65910\n");
if (accel_regulator_init())
puts("failed to set VMMC regulator for tps65910\n");
//MUX_BEAGLE_XM();
dieid_num_r();
return 0;
}
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
* hardware. Many pins need to be moved from protect to primary
* mode.
*/
void set_muxconf_regs(void)
{
MUX_EVM();
}
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