1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
|
/*
* (C) Copyright 2004-2011
* Texas Instruments, <www.ti.com>
*
* Author :
* Sunil Kumar <sunilsaini05@gmail.com>
* Shashi Ranjan <shashiranjanmca05@gmail.com>
*
* Derived from Beagle Board and 3430 SDP code by
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/errno.h>
#include "h1.h"
#include <command.h>
#include <power/tps65910.h>
#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_H1;
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
return 0;
}
#ifdef CONFIG_SPL_BUILD
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
* so we have to setup the DDR timings ourself on both banks.
*/
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
int pop_mfr, pop_id;
/*
* We need to identify what PoP memory is on the board so that
* we know what timings to use. If we can't identify it then
* we know it's an xM. To map the ID values please see nand_ids.c
*/
identify_nand_chip(&pop_mfr, &pop_id);
timings->mr = MICRON_V_MR_165;
/* 128MB DDR */
timings->mcfg = MICRON_V_MCFG_200(256 << 20);
timings->ctrla = MICRON_V_ACTIMA_200;
timings->ctrlb = MICRON_V_ACTIMB_200;
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
}
#endif
/*
* Routine: tps65910_voltages_init
* Description: initialize voltages supplied by PMIC
* On the board we have BOOT0 = 1, BOOT = 0, this defines
* the voltages supplied by PMIC when power is applied to its
* input.
* We only need to set up only VDIG1, VAUX2, VMMC
*/
#define TPS65910_VDIG1_REG 0x30
#define TPS65910_VAUX2_REG 0x33
#define TPS65910_VMMC_REG 0x35
struct vsel_map_t {
uchar reg_addr;
uchar vsel;
};
static struct vsel_map_t tps65910_volt[] = {
{
.reg_addr = TPS65910_VDIG1_REG,
/* SEL[1:0] = 10 (1.8 V), ST[1:0] = On high power (ACTIVE) */
.vsel = 0x9,
},
{
.reg_addr = TPS65910_VAUX2_REG,
/* SEL[1:0] = 11 (3.3 V), ST[1:0] = On high power (ACTIVE) */
.vsel = 0xd,
},
{
.reg_addr = TPS65910_VMMC_REG,
/* SEL[1:0] = 11 (3.3 V), ST[1:0] = On high power (ACTIVE) */
.vsel = 0xd,
},
};
static int tps65910_voltages_init(void)
{
struct vsel_map_t *p = tps65910_volt;
int i, ret;
/*
* dummy i2c bus access is required to workaround tps65910 errata
* "Glitch on SDA-SCL not managed correctly by the I2C IP"
*/
i = 2;
do
ret = i2c_probe(TPS65910_CTRL_I2C_ADDR);
while (ret && --i);
if (ret)
return -1;
/* Tell the TPS65910 to use i2c */
ret = tps65910_set_i2c_control();
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(tps65910_volt); i++) {
ret = i2c_write(TPS65910_CTRL_I2C_ADDR, p->reg_addr, 1, &p->vsel, 1);
if (ret)
return ret;
p++;
}
return 0;
}
#define TPS65910_VDIG1_REG 0x30
static int accel_regulator_init(void)
{
uchar buf;
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return -1;
/* Tell the TPS65910 to use i2c */
tps65910_set_i2c_control();
/* SEL[1:0] = 1.8 V, ST[1:0] = On high power (ACTIVE) */
buf = 0x09;
/* set VDIG1_REG to supply 1.8 V */
return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_VDIG1_REG, 1, &buf, 1);
}
/*
* Routine: misc_init_r
* Description: Configure board specific parts
*/
int misc_init_r(void)
{
struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
if (accel_regulator_init())
puts("failed to set VMMC regulator for tps65910\n");
if (tps65910_voltages_init())
puts("failed to initialise tps65910 voltages\n");
//MUX_BEAGLE_XM();
dieid_num_r();
return 0;
}
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
* hardware. Many pins need to be moved from protect to primary
* mode.
*/
void set_muxconf_regs(void)
{
MUX_EVM();
}
|
