diff options
Diffstat (limited to 'include/linux/mtd/nand.h')
| -rw-r--r-- | include/linux/mtd/nand.h | 115 | 
1 files changed, 113 insertions, 2 deletions
| diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index a3a7ec352..442518721 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -1,10 +1,11 @@  /* - *  u-boot/include/linux/mtd/nand.h + *  linux/include/linux/mtd/nand.h   *   *  Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>   *                     Steven J. Hill <sjhill@cotw.com> + *		       Thomas Gleixner <gleixner@autronix.de>   * - * $Id: nand.h,v 1.8 2000/10/30 17:16:17 sjhill Exp $ + * $Id: nand.h,v 1.13 2002/04/28 13:40:41 gleixner Exp $   *   * This program is free software; you can redistribute it and/or modify   * it under the terms of the GNU General Public License version 2 as @@ -23,6 +24,14 @@   *			bat later if I did something naughty.   *   10-11-2000 SJH     Added private NAND flash structure for driver   *   10-24-2000 SJH     Added prototype for 'nand_scan' function + *   10-29-2001 TG	changed nand_chip structure to support  + *			hardwarespecific function for accessing control lines + *   02-21-2002 TG	added support for different read/write adress and + *			ready/busy line access function + *   02-26-2002 TG	added chip_delay to nand_chip structure to optimize + *			command delay times for different chips + *   04-28-2002 TG	OOB config defines moved from nand.c to avoid duplicate + *			defines in jffs2/wbuf.c   */  #ifndef __LINUX_MTD_NAND_H  #define __LINUX_MTD_NAND_H @@ -42,6 +51,82 @@  #define NAND_CMD_RESET		0xff  /* + * Enumeration for NAND flash chip state + */ +typedef enum { +	FL_READY, +	FL_READING, +	FL_WRITING, +	FL_ERASING, +	FL_SYNCING +} nand_state_t; + + +/* + * NAND Private Flash Chip Data + * + * Structure overview: + * + *  IO_ADDR - address to access the 8 I/O lines of the flash device  + * + *  hwcontrol - hardwarespecific function for accesing control-lines + * + *  dev_ready - hardwarespecific function for accesing device ready/busy line + * + *  chip_lock - spinlock used to protect access to this structure + * + *  wq - wait queue to sleep on if a NAND operation is in progress + * + *  state - give the current state of the NAND device + * + *  page_shift - number of address bits in a page (column address bits) + * + *  data_buf - data buffer passed to/from MTD user modules + * + *  data_cache - data cache for redundant page access and shadow for + *		 ECC failure + * + *  ecc_code_buf - used only for holding calculated or read ECCs for + *                 a page read or written when ECC is in use + * + *  reserved - padding to make structure fall on word boundary if + *             when ECC is in use + */ +struct Nand { +	char floor, chip; +	unsigned long curadr; +	unsigned char curmode; +	/* Also some erase/write/pipeline info when we get that far */ +}; + +struct nand_chip { +	int 		page_shift; +	u_char 		*data_buf; +	u_char 		*data_cache; +	int		cache_page; +	u_char 		ecc_code_buf[6]; +	u_char 		reserved[2]; +	char ChipID; /* Type of DiskOnChip */ +	struct Nand *chips; +	int chipshift; +	char* chips_name; +	unsigned long erasesize; +	unsigned long mfr; /* Flash IDs - only one type of flash per device */ +	unsigned long id; +	char* name; +	struct NFTLrecord nftl; +	int nftl_found; +	int numchips; +	char page256; +	char pageadrlen; +	unsigned long IO_ADDR;  /* address to access the 8 I/O lines to the flash device */ +	unsigned long totlen; +	uint oobblock;  // Size of OOB blocks (e.g. 512) +	uint oobsize;   // Amount of OOB data per block (e.g. 16) +	uint eccsize; +}; + +/*   * NAND Flash Manufacturer ID Codes   */  #define NAND_MFR_TOSHIBA	0x98 @@ -84,4 +169,30 @@ struct nand_flash_dev {  	unsigned long erasesize;  }; +/* +* Constants for oob configuration +*/ +#define NAND_NOOB_ECCPOS0		0 +#define NAND_NOOB_ECCPOS1		1 +#define NAND_NOOB_ECCPOS2		2 +#define NAND_NOOB_ECCPOS3		3 +#define NAND_NOOB_ECCPOS4		4 +#define NAND_NOOB_ECCPOS5		5 +#define NAND_NOOB_BADBPOS		-1 +#define NAND_NOOB_ECCVPOS		-1 + +#define NAND_JFFS2_OOB_ECCPOS0		0 +#define NAND_JFFS2_OOB_ECCPOS1		1 +#define NAND_JFFS2_OOB_ECCPOS2		2 +#define NAND_JFFS2_OOB_ECCPOS3		3 +#define NAND_JFFS2_OOB_ECCPOS4		6 +#define NAND_JFFS2_OOB_ECCPOS5		7 +#define NAND_JFFS2_OOB_BADBPOS		5 +#define NAND_JFFS2_OOB_ECCVPOS		4 + +#define NAND_JFFS2_OOB8_FSDAPOS		6 +#define NAND_JFFS2_OOB16_FSDAPOS	8 +#define NAND_JFFS2_OOB8_FSDALEN		2 +#define NAND_JFFS2_OOB16_FSDALEN	8 +  #endif /* __LINUX_MTD_NAND_H */ |