diff options
Diffstat (limited to 'board/gdsys/405ep/io.c')
| -rw-r--r-- | board/gdsys/405ep/io.c | 34 | 
1 files changed, 34 insertions, 0 deletions
| diff --git a/board/gdsys/405ep/io.c b/board/gdsys/405ep/io.c index db1ea7f0c..ac4cefde6 100644 --- a/board/gdsys/405ep/io.c +++ b/board/gdsys/405ep/io.c @@ -29,8 +29,13 @@  #include <miiphy.h> +#include "405ep.h"  #include <gdsys_fpga.h> +#define LATCH0_BASE (CONFIG_SYS_LATCH_BASE) +#define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100) +#define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200) +  #define PHYREG_CONTROL				0  #define PHYREG_PAGE_ADDRESS			22  #define PHYREG_PG0_COPPER_SPECIFIC_CONTROL_1	16 @@ -175,3 +180,32 @@ int last_stage_init(void)  	return 0;  } + +void gd405ep_init(void) +{ +} + +void gd405ep_set_fpga_reset(unsigned state) +{ +	if (state) { +		out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET); +		out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET); +	} else { +		out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT); +		out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT); +	} +} + +void gd405ep_setup_hw(void) +{ +	/* +	 * set "startup-finished"-gpios +	 */ +	gpio_write_bit(21, 0); +	gpio_write_bit(22, 1); +} + +int gd405ep_get_fpga_done(unsigned fpga) +{ +	return in_le16((void *)LATCH2_BASE) & CONFIG_SYS_FPGA_DONE(fpga); +} |