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-rw-r--r--board/amcc/acadia/u-boot-nand.lds2
-rw-r--r--board/amcc/bamboo/u-boot-nand.lds2
-rw-r--r--board/amcc/canyonlands/canyonlands.c2
-rw-r--r--board/amcc/canyonlands/u-boot-nand.lds2
-rw-r--r--board/amcc/katmai/katmai.c2
-rw-r--r--board/amcc/kilauea/u-boot-nand.lds2
-rw-r--r--board/amcc/luan/luan.c2
-rw-r--r--board/amcc/sequoia/sdram.c2
-rw-r--r--board/amcc/sequoia/u-boot-nand.lds2
-rw-r--r--board/amcc/sequoia/u-boot-ram.lds2
-rw-r--r--board/amcc/yucca/yucca.c2
11 files changed, 11 insertions, 11 deletions
diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
index 738caa0c5..bfca58271 100644
--- a/board/amcc/acadia/u-boot-nand.lds
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x4000);
diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds
index 738caa0c5..bfca58271 100644
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ b/board/amcc/bamboo/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x4000);
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index 13a0daced..71a570191 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define BOARD_ARCHES 4
/*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
#if defined(CONFIG_ARCHES)
diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds
index 47c6bd921..b04b05e38 100644
--- a/board/amcc/canyonlands/u-boot-nand.lds
+++ b/board/amcc/canyonlands/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x20000);
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 54e2a39aa..15291f96b 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -249,7 +249,7 @@ int checkboard (void)
}
/*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
u32 ddr_wrdtr(u32 default_val) {
diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds
index 738caa0c5..bfca58271 100644
--- a/board/amcc/kilauea/u-boot-nand.lds
+++ b/board/amcc/kilauea/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x4000);
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 332d170d6..6542565f0 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -119,7 +119,7 @@ int checkboard(void)
}
/*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
u32 ddr_clktr(u32 default_val) {
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index bde471c2e..b5c7d6d50 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void);
extern void denali_core_search_data_eye(void);
#if defined(CONFIG_NAND_SPL)
-/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
+/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big
* for the 4k NAND boot image so define bus_frequency to 133MHz here
* which is save for the refresh counter setup.
*/
diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds
index fb629e0c5..8a71bfa44 100644
--- a/board/amcc/sequoia/u-boot-nand.lds
+++ b/board/amcc/sequoia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x4000);
diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds
index e22dbecbf..c6a321e40 100644
--- a/board/amcc/sequoia/u-boot-ram.lds
+++ b/board/amcc/sequoia/u-boot-ram.lds
@@ -50,7 +50,7 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
- cpu/ppc4xx/start.o (.text)
+ arch/ppc/cpu/ppc4xx/start.o (.text)
*(.text)
*(.got1)
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 8c65cfb6f..241f48449 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -555,7 +555,7 @@ int checkboard (void)
}
/*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
static int ppc440spe_rev_a(void)
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-30 21:58:46 +0000