diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/fdt.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fdt.c | 34 | 
1 files changed, 30 insertions, 4 deletions
| diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index a0a9b4c5a..ab0933076 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -47,8 +47,8 @@ extern void ft_srio_setup(void *blob);  void ft_fixup_cpu(void *blob, u64 memory_limit)  {  	int off; -	ulong spin_tbl_addr = get_spin_phys_addr(); -	u32 bootpg = determine_mp_bootpg(); +	phys_addr_t spin_tbl_addr = get_spin_phys_addr(); +	u32 bootpg = determine_mp_bootpg(NULL);  	u32 id = get_my_id();  	const char *enable_method; @@ -97,7 +97,16 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)  	if ((u64)bootpg < memory_limit) {  		off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);  		if (off < 0) -			printf("%s: %s\n", __FUNCTION__, fdt_strerror(off)); +			printf("Failed to reserve memory for bootpg: %s\n", +				fdt_strerror(off)); +	} +	/* Reserve spin table page */ +	if (spin_tbl_addr < memory_limit) { +		off = fdt_add_mem_rsv(blob, +			(spin_tbl_addr & ~0xffful), 4096); +		if (off < 0) +			printf("Failed to reserve memory for spin table: %s\n", +				fdt_strerror(off));  	}  }  #endif @@ -220,12 +229,19 @@ static inline void ft_fixup_l2cache(void *blob)  	/* we dont bother w/L3 since no platform of this type has one */  } -#elif defined(CONFIG_BACKSIDE_L2_CACHE) +#elif defined(CONFIG_BACKSIDE_L2_CACHE) || \ +	defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)  static inline void ft_fixup_l2cache(void *blob)  {  	int off, l2_off, l3_off = -1;  	u32 *ph; +#ifdef	CONFIG_BACKSIDE_L2_CACHE  	u32 l2cfg0 = mfspr(SPRN_L2CFG0); +#else +	struct ccsr_cluster_l2 *l2cache = +		(struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2); +	u32 l2cfg0 = in_be32(&l2cache->l2cfg0); +#endif  	u32 size, line_size, num_ways, num_sets;  	int has_l2 = 1; @@ -257,7 +273,12 @@ static inline void ft_fixup_l2cache(void *blob)  		if (has_l2) {  #ifdef CONFIG_SYS_CACHE_STASHING  			u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); +#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 +			/* Only initialize every eighth thread */ +			if (reg && !((*reg) % 8)) +#else  			if (reg) +#endif  				fdt_setprop_cell(blob, l2_off, "cache-stash-id",  					 (*reg * 2) + 32 + 1);  #endif @@ -390,6 +411,11 @@ static void ft_fixup_dpaa_clks(void *blob)  #endif  #endif +#ifdef CONFIG_SYS_DPAA_QBMAN +	do_fixup_by_compat_u32(blob, "fsl,qman", +			"clock-frequency", sysinfo.freqQMAN, 1); +#endif +  #ifdef CONFIG_SYS_DPAA_PME  	do_fixup_by_compat_u32(blob, "fsl,pme",  		"clock-frequency", sysinfo.freqPME, 1); |