diff options
Diffstat (limited to 'arch/arm/cpu/armv7/omap5/sdram.c')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/sdram.c | 119 |
1 files changed, 77 insertions, 42 deletions
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 6ebdf5fbf..687800fac 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -116,6 +116,56 @@ const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = { .dmm_lisa_map_3 = 0xFF020100 }; +static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) +{ + switch (omap_revision()) { + case OMAP5430_ES1_0: + *regs = &emif_regs_532_mhz_2cs; + break; + case OMAP5432_ES1_0: + *regs = &emif_regs_ddr3_532_mhz_1cs; + break; + default: + *regs = &emif_regs_ddr3_532_mhz_1cs; + } +} + +void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) + __attribute__((weak, alias("emif_get_reg_dump_sdp"))); + +static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs + **dmm_lisa_regs) +{ + *dmm_lisa_regs = &lisa_map_4G_x_2_x_2; +} + +void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) + __attribute__((weak, alias("emif_get_dmm_regs_sdp"))); +#else + +static const struct lpddr2_device_details dev_4G_S4_details = { + .type = LPDDR2_TYPE_S4, + .density = LPDDR2_DENSITY_4Gb, + .io_width = LPDDR2_IO_WIDTH_32, + .manufacturer = LPDDR2_MANUFACTURER_SAMSUNG +}; + +static void emif_get_device_details_sdp(u32 emif_nr, + struct lpddr2_device_details *cs0_device_details, + struct lpddr2_device_details *cs1_device_details) +{ + /* EMIF1 & EMIF2 have identical configuration */ + *cs0_device_details = dev_4G_S4_details; + *cs1_device_details = dev_4G_S4_details; +} + +void emif_get_device_details(u32 emif_nr, + struct lpddr2_device_details *cs0_device_details, + struct lpddr2_device_details *cs1_device_details) + __attribute__((weak, alias("emif_get_device_details_sdp"))); + +#endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */ + const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = { 0x01004010, 0x00001004, @@ -138,7 +188,7 @@ const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = { 0x00000077 }; -const u32 ddr3_ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = { +const u32 ddr3_ext_phy_ctrl_const_base_es1[EMIF_EXT_PHY_CTRL_CONST_REG] = { 0x01004010, 0x00001004, 0x04010040, @@ -160,54 +210,38 @@ const u32 ddr3_ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = { 0x00000057 }; -static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) -{ - if (omap_revision() == OMAP5432_ES1_0) - *regs = &emif_regs_ddr3_532_mhz_1cs; - else - *regs = &emif_regs_532_mhz_2cs; -} -void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) - __attribute__((weak, alias("emif_get_reg_dump_sdp"))); +const struct lpddr2_mr_regs mr_regs = { + .mr1 = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_8, + .mr2 = 0x6, + .mr3 = 0x1, + .mr10 = MR10_ZQ_ZQINIT, + .mr16 = MR16_REF_FULL_ARRAY +}; -static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs - **dmm_lisa_regs) +static void emif_get_ext_phy_ctrl_const_regs(const u32 **regs) { - *dmm_lisa_regs = &lisa_map_4G_x_2_x_2; + switch (omap_revision()) { + case OMAP5430_ES1_0: + *regs = ext_phy_ctrl_const_base; + break; + case OMAP5432_ES1_0: + *regs = ddr3_ext_phy_ctrl_const_base_es1; + break; + default: + *regs = ddr3_ext_phy_ctrl_const_base_es1; + } } -void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) - __attribute__((weak, alias("emif_get_dmm_regs_sdp"))); - -#else - -static const struct lpddr2_device_details dev_4G_S4_details = { - .type = LPDDR2_TYPE_S4, - .density = LPDDR2_DENSITY_4Gb, - .io_width = LPDDR2_IO_WIDTH_32, - .manufacturer = LPDDR2_MANUFACTURER_SAMSUNG -}; - -static void emif_get_device_details_sdp(u32 emif_nr, - struct lpddr2_device_details *cs0_device_details, - struct lpddr2_device_details *cs1_device_details) +void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs) { - /* EMIF1 & EMIF2 have identical configuration */ - *cs0_device_details = dev_4G_S4_details; - *cs1_device_details = dev_4G_S4_details; + *regs = &mr_regs; } -void emif_get_device_details(u32 emif_nr, - struct lpddr2_device_details *cs0_device_details, - struct lpddr2_device_details *cs1_device_details) - __attribute__((weak, alias("emif_get_device_details_sdp"))); - -#endif /* CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS */ - void do_ext_phy_settings(u32 base, const struct emif_regs *regs) { u32 *ext_phy_ctrl_base = 0; u32 *emif_ext_phy_ctrl_base = 0; + const u32 *ext_phy_ctrl_const_regs; u32 i = 0; struct emif_reg_struct *emif = (struct emif_reg_struct *)base; @@ -226,12 +260,13 @@ void do_ext_phy_settings(u32 base, const struct emif_regs *regs) * external phy 6-24 registers do not change with * ddr frequency */ + emif_get_ext_phy_ctrl_const_regs(&ext_phy_ctrl_const_regs); for (i = 0; i < EMIF_EXT_PHY_CTRL_CONST_REG; i++) { - writel(ext_phy_ctrl_const_base[i], - emif_ext_phy_ctrl_base++); + writel(ext_phy_ctrl_const_regs[i], + emif_ext_phy_ctrl_base++); /* Update shadow registers */ - writel(ext_phy_ctrl_const_base[i], - emif_ext_phy_ctrl_base++); + writel(ext_phy_ctrl_const_regs[i], + emif_ext_phy_ctrl_base++); } } |