diff options
| -rw-r--r-- | board/denx/m28evk/m28evk.c | 20 | ||||
| -rw-r--r-- | board/denx/m28evk/spl_boot.c | 8 |
2 files changed, 25 insertions, 3 deletions
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c index 53df4761f..3d28ea84d 100644 --- a/board/denx/m28evk/m28evk.c +++ b/board/denx/m28evk/m28evk.c @@ -90,6 +90,8 @@ int board_mmc_init(bd_t *bis) { /* Configure WP as input. */ gpio_direction_input(MX28_PAD_AUART2_CTS__GPIO_3_10); + /* Turn on the power to the card. */ + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); return mxsmmc_initialize(bis, 0, m28_mmc_wp); } @@ -103,10 +105,18 @@ int board_mmc_init(bd_t *bis) int fecmxc_mii_postcall(int phy) { +#if defined(CONFIG_DENX_M28_V11) || defined(CONFIG_DENX_M28_V10) + /* KZ8031 PHY on old boards. */ + const uint32_t freq = 0x0080; +#else + /* KZ8021 PHY on new boards. */ + const uint32_t freq = 0x0000; +#endif + miiphy_write("FEC1", phy, MII_BMCR, 0x9000); miiphy_write("FEC1", phy, MII_OPMODE_STRAP_OVERRIDE, 0x0202); if (phy == 3) - miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8180); + miiphy_write("FEC1", 3, MII_PHY_CTRL2, 0x8100 | freq); return 0; } @@ -123,6 +133,14 @@ int board_eth_init(bd_t *bis) CLKCTRL_ENET_TIME_SEL_MASK | CLKCTRL_ENET_CLK_OUT_EN, CLKCTRL_ENET_TIME_SEL_RMII_CLK); +#if !defined(CONFIG_DENX_M28_V11) && !defined(CONFIG_DENX_M28_V10) + /* Reset the new PHY */ + gpio_direction_output(MX28_PAD_AUART2_RTS__GPIO_3_11, 0); + udelay(10000); + gpio_set_value(MX28_PAD_AUART2_RTS__GPIO_3_11, 1); + udelay(10000); +#endif + ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE); if (ret) { printf("FEC MXS: Unable to init FEC0\n"); diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c index a04fe180c..7a125925d 100644 --- a/board/denx/m28evk/spl_boot.c +++ b/board/denx/m28evk/spl_boot.c @@ -109,8 +109,9 @@ const iomux_cfg_t iomux_setup[] = { (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), MX28_PAD_SSP0_SCK__SSP0_SCK | (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), - MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0, /* Power .. FIXME */ - MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP ... FIXME */ + MX28_PAD_PWM3__GPIO_3_28 | MUX_CONFIG_SSP0 | + (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL), /* Power */ + MX28_PAD_AUART2_CTS__GPIO_3_10, /* WP */ /* GPMI NAND */ MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI, @@ -147,6 +148,9 @@ const iomux_cfg_t iomux_setup[] = { MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET, MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET, MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET, +#if !defined(CONFIG_DENX_M28_V11) && !defined(CONFIG_DENX_M28_V10) + MX28_PAD_AUART2_RTS__GPIO_3_11, /* PHY reset */ +#endif /* I2C */ MX28_PAD_I2C0_SCL__I2C0_SCL, |