diff options
| -rw-r--r-- | board/renesas/koelsch/koelsch.c | 77 | ||||
| -rw-r--r-- | include/configs/koelsch.h | 23 | 
2 files changed, 98 insertions, 2 deletions
| diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 7153f652b..73cad66f1 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -16,6 +16,8 @@  #include <asm/arch/sys_proto.h>  #include <asm/gpio.h>  #include <asm/arch/rmobile.h> +#include <netdev.h> +#include <miiphy.h>  #include <i2c.h>  #include "qos.h" @@ -207,6 +209,10 @@ void s_init(void)  #define SMSTPCR7	0xE615014C  #define SCIF0_MSTP721	(1 << 21) +#define MSTPSR8		0xE61509A0 +#define SMSTPCR8	0xE6150990 +#define ETHER_MSTP813	(1 << 13) +  #define PMMR	0xE6060000  #define GPSR4	0xE6060014  #define IPSR14	0xE6060058 @@ -241,9 +247,16 @@ int board_early_init_f(void)  	mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); +	/* ETHER */ +	mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); +  	return 0;  } +/* LSI pin pull-up control */ +#define PUPR5 0xe6060114 +#define PUPR5_ETH 0x3FFC0000 +#define PUPR5_ETH_MAGIC	(1 << 27)  int board_init(void)  {  	/* adress of boot parameters */ @@ -252,7 +265,57 @@ int board_init(void)  	/* Init PFC controller */  	r8a7791_pinmux_init(); +	/* ETHER Enable */ +	gpio_request(GPIO_FN_ETH_CRS_DV, NULL); +	gpio_request(GPIO_FN_ETH_RX_ER, NULL); +	gpio_request(GPIO_FN_ETH_RXD0, NULL); +	gpio_request(GPIO_FN_ETH_RXD1, NULL); +	gpio_request(GPIO_FN_ETH_LINK, NULL); +	gpio_request(GPIO_FN_ETH_REFCLK, NULL); +	gpio_request(GPIO_FN_ETH_MDIO, NULL); +	gpio_request(GPIO_FN_ETH_TXD1, NULL); +	gpio_request(GPIO_FN_ETH_TX_EN, NULL); +	gpio_request(GPIO_FN_ETH_TXD0, NULL); +	gpio_request(GPIO_FN_ETH_MDC, NULL); +	gpio_request(GPIO_FN_IRQ0, NULL); + +	mstp_clrbits_le32(PUPR5, PUPR5, PUPR5_ETH & ~PUPR5_ETH_MAGIC); +	gpio_request(GPIO_GP_5_22, NULL); /* PHY_RST */ +	mstp_clrbits_le32(PUPR5, PUPR5, PUPR5_ETH_MAGIC); + +	gpio_direction_output(GPIO_GP_5_22, 0); +	mdelay(20); +	gpio_set_value(GPIO_GP_5_22, 1); +	udelay(1); + +	return 0; +} + +#define CXR24 0xEE7003C0 /* MAC address high register */ +#define CXR25 0xEE7003C8 /* MAC address low register */ +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SH_ETHER +	int ret = -ENODEV; +	u32 val; +	unsigned char enetaddr[6]; + +	ret = sh_eth_initialize(bis); +	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) +		return ret; + +	/* Set Mac address */ +	val = enetaddr[0] << 24 | enetaddr[1] << 16 | +		enetaddr[2] << 8 | enetaddr[3]; +	writel(val, CXR24); + +	val = enetaddr[4] << 8 | enetaddr[5]; +	writel(val, CXR25); + +	return ret; +#else  	return 0; +#endif  }  int dram_init(void) @@ -263,6 +326,20 @@ int dram_init(void)  	return 0;  } +/* koelsch has KSZ8041NL/RNL */ +#define PHY_CONTROL1	0x1E +#define PHY_LED_MODE	0xC0000 +#define PHY_LED_MODE_ACK	0x4000 +int board_phy_config(struct phy_device *phydev) +{ +	int ret = phy_read(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1); +	ret &= ~PHY_LED_MODE; +	ret |= PHY_LED_MODE_ACK; +	ret = phy_write(phydev, MDIO_DEVAD_NONE, PHY_CONTROL1, (u16)ret); + +	return 0; +} +  const struct rmobile_sysinfo sysinfo = {  	CONFIG_RMOBILE_BOARD_STRING  }; diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 59c494854..32ceff3d7 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -18,13 +18,18 @@  #include <asm/arch/rmobile.h> -#define	CONFIG_CMD_EDITENV -#define	CONFIG_CMD_SAVEENV +#define CONFIG_CMD_EDITENV +#define CONFIG_CMD_SAVEENV  #define CONFIG_CMD_MEMORY  #define CONFIG_CMD_DFL  #define CONFIG_CMD_SDRAM  #define CONFIG_CMD_RUN  #define CONFIG_CMD_LOADS +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NFS  #define CONFIG_CMD_BOOTZ  #define	CONFIG_CMD_FLASH @@ -123,6 +128,20 @@  #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)  #define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN) +/* SH Ether */ +#define	CONFIG_NET_MULTI +#define CONFIG_SH_ETHER +#define CONFIG_SH_ETHER_USE_PORT	0 +#define CONFIG_SH_ETHER_PHY_ADDR	0x1 +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +  /* Board Clock */  #define	CONFIG_SYS_CLK_FREQ	10000000  #define CONFIG_SH_TMU_CLK_FREQ	CONFIG_SYS_CLK_FREQ |