diff options
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/fsl_ifc.c | 24 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_ifc.h | 2 | ||||
| -rw-r--r-- | drivers/mtd/nand/fsl_ifc_nand.c | 78 | ||||
| -rw-r--r-- | drivers/mtd/nand/fsl_ifc_spl.c | 7 | 
4 files changed, 109 insertions, 2 deletions
| diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c index 2d0fb433b..64a52258a 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c @@ -34,6 +34,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR0_EXT  	set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);  #endif +#ifdef CONFIG_SYS_CSOR0_EXT +	set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT); +#endif  	set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);  	set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);  	set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0); @@ -43,6 +46,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR1_EXT  	set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);  #endif +#ifdef CONFIG_SYS_CSOR1_EXT +	set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT); +#endif  #if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)  	set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);  	set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1); @@ -57,6 +63,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR2_EXT  	set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);  #endif +#ifdef CONFIG_SYS_CSOR2_EXT +	set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT); +#endif  #if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)  	set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);  	set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1); @@ -71,6 +80,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR3_EXT  	set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);  #endif +#ifdef CONFIG_SYS_CSOR3_EXT +	set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT); +#endif  #if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)  	set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);  	set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1); @@ -85,6 +97,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR4_EXT  	set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT);  #endif +#ifdef CONFIG_SYS_CSOR4_EXT +	set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT); +#endif  #if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)  	set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0);  	set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1); @@ -99,6 +114,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR5_EXT  	set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);  #endif +#ifdef CONFIG_SYS_CSOR5_EXT +	set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT); +#endif  #if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)  	set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);  	set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1); @@ -113,6 +131,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR6_EXT  	set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT);  #endif +#ifdef CONFIG_SYS_CSOR6_EXT +	set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT); +#endif  #if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)  	set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0);  	set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1); @@ -127,6 +148,9 @@ void init_early_memctl_regs(void)  #ifdef CONFIG_SYS_CSPR7_EXT  	set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT);  #endif +#ifdef CONFIG_SYS_CSOR7_EXT +	set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT); +#endif  #if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)  	set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0);  	set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1); diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h index a945e4b2d..182b1a633 100644 --- a/arch/powerpc/include/asm/fsl_ifc.h +++ b/arch/powerpc/include/asm/fsl_ifc.h @@ -77,6 +77,7 @@  #define CSOR_NAND_PGS_512		0x00000000  #define CSOR_NAND_PGS_2K		0x00080000  #define CSOR_NAND_PGS_4K		0x00100000 +#define CSOR_NAND_PGS_8K		0x00180000  /* Spare region Size */  #define CSOR_NAND_SPRZ_MASK		0x0000E000  #define CSOR_NAND_SPRZ_SHIFT		13 @@ -86,6 +87,7 @@  #define CSOR_NAND_SPRZ_210		0x00006000  #define CSOR_NAND_SPRZ_218		0x00008000  #define CSOR_NAND_SPRZ_224		0x0000A000 +#define CSOR_NAND_SPRZ_CSOR_EXT	0x0000C000  /* Pages Per Block */  #define CSOR_NAND_PB_MASK		0x00000700  #define CSOR_NAND_PB_SHIFT		8 diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 1d18815b2..49b63af85 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -125,6 +125,69 @@ static struct nand_ecclayout oob_4096_ecc8 = {  	.oobfree = { {2, 6}, {136, 82} },  }; +/* 8192-byte page size with 4-bit ECC */ +static struct nand_ecclayout oob_8192_ecc4 = { +	.eccbytes = 128, +	.eccpos = { +		8, 9, 10, 11, 12, 13, 14, 15, +		16, 17, 18, 19, 20, 21, 22, 23, +		24, 25, 26, 27, 28, 29, 30, 31, +		32, 33, 34, 35, 36, 37, 38, 39, +		40, 41, 42, 43, 44, 45, 46, 47, +		48, 49, 50, 51, 52, 53, 54, 55, +		56, 57, 58, 59, 60, 61, 62, 63, +		64, 65, 66, 67, 68, 69, 70, 71, +		72, 73, 74, 75, 76, 77, 78, 79, +		80, 81, 82, 83, 84, 85, 86, 87, +		88, 89, 90, 91, 92, 93, 94, 95, +		96, 97, 98, 99, 100, 101, 102, 103, +		104, 105, 106, 107, 108, 109, 110, 111, +		112, 113, 114, 115, 116, 117, 118, 119, +		120, 121, 122, 123, 124, 125, 126, 127, +		128, 129, 130, 131, 132, 133, 134, 135, +	}, +	.oobfree = { {2, 6}, {136, 208} }, +}; + +/* 8192-byte page size with 8-bit ECC -- requires 218-byte OOB */ +static struct nand_ecclayout oob_8192_ecc8 = { +	.eccbytes = 256, +	.eccpos = { +		8, 9, 10, 11, 12, 13, 14, 15, +		16, 17, 18, 19, 20, 21, 22, 23, +		24, 25, 26, 27, 28, 29, 30, 31, +		32, 33, 34, 35, 36, 37, 38, 39, +		40, 41, 42, 43, 44, 45, 46, 47, +		48, 49, 50, 51, 52, 53, 54, 55, +		56, 57, 58, 59, 60, 61, 62, 63, +		64, 65, 66, 67, 68, 69, 70, 71, +		72, 73, 74, 75, 76, 77, 78, 79, +		80, 81, 82, 83, 84, 85, 86, 87, +		88, 89, 90, 91, 92, 93, 94, 95, +		96, 97, 98, 99, 100, 101, 102, 103, +		104, 105, 106, 107, 108, 109, 110, 111, +		112, 113, 114, 115, 116, 117, 118, 119, +		120, 121, 122, 123, 124, 125, 126, 127, +		128, 129, 130, 131, 132, 133, 134, 135, +		136, 137, 138, 139, 140, 141, 142, 143, +		144, 145, 146, 147, 148, 149, 150, 151, +		152, 153, 154, 155, 156, 157, 158, 159, +		160, 161, 162, 163, 164, 165, 166, 167, +		168, 169, 170, 171, 172, 173, 174, 175, +		176, 177, 178, 179, 180, 181, 182, 183, +		184, 185, 186, 187, 188, 189, 190, 191, +		192, 193, 194, 195, 196, 197, 198, 199, +		200, 201, 202, 203, 204, 205, 206, 207, +		208, 209, 210, 211, 212, 213, 214, 215, +		216, 217, 218, 219, 220, 221, 222, 223, +		224, 225, 226, 227, 228, 229, 230, 231, +		232, 233, 234, 235, 236, 237, 238, 239, +		240, 241, 242, 243, 244, 245, 246, 247, +		248, 249, 250, 251, 252, 253, 254, 255, +		256, 257, 258, 259, 260, 261, 262, 263, +	}, +	.oobfree = { {2, 6}, {264, 80} }, +};  /*   * Generic flash bbt descriptors @@ -913,6 +976,21 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)  		priv->bufnum_mask = 1;  		break; +	case CSOR_NAND_PGS_8K: +		if ((csor & CSOR_NAND_ECC_MODE_MASK) == +		    CSOR_NAND_ECC_MODE_4) { +			layout = &oob_8192_ecc4; +			nand->ecc.strength = 4; +		} else { +			layout = &oob_8192_ecc8; +			nand->ecc.strength = 8; +			nand->ecc.bytes = 16; +		} + +		priv->bufnum_mask = 0; +		break; + +  	default:  		printf("ifc nand: bad csor %#x: bad page size\n", csor);  		return -ENODEV; diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c index d4622653f..9fa5ccbc5 100644 --- a/drivers/mtd/nand/fsl_ifc_spl.c +++ b/drivers/mtd/nand/fsl_ifc_spl.c @@ -112,10 +112,13 @@ static void nand_load(unsigned int offs, int uboot_size, uchar *dst)  	port_size = (cspr & CSPR_PORT_SIZE_16) ? 16 : 8; -	if (csor & CSOR_NAND_PGS_4K) { +	if ((csor & CSOR_NAND_PGS_MASK) == CSOR_NAND_PGS_8K) { +		page_size = 8192; +		bufnum_mask = 0x0; +	} else if ((csor & CSOR_NAND_PGS_MASK) == CSOR_NAND_PGS_4K) {  		page_size = 4096;  		bufnum_mask = 0x1; -	} else if (csor & CSOR_NAND_PGS_2K) { +	} else if ((csor & CSOR_NAND_PGS_MASK) == CSOR_NAND_PGS_2K) {  		page_size = 2048;  		bufnum_mask = 0x3;  	} else { |