diff options
| -rw-r--r-- | .gitignore | 30 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/board.c | 2 | ||||
| -rw-r--r-- | common/spl/spl.c | 256 | ||||
| -rw-r--r-- | include/configs/omap3_h1.h | 14 |
4 files changed, 288 insertions, 14 deletions
diff --git a/.gitignore b/.gitignore index 0f32fd895..14cdea38b 100644 --- a/.gitignore +++ b/.gitignore @@ -15,16 +15,28 @@ *.swp *.patch *.bin +*.cfgtmp +*.dts.tmp + +# TI CCS project ignores +.cproject +.project + +# Build tree +/build-* # # Top-level generic files # -/MLO +/MLO* +/SPL /System.map /u-boot /u-boot.hex /u-boot.imx +/u-boot-with-spl.imx +/u-boot-with-nand-spl.imx /u-boot.map /u-boot.srec /u-boot.ldr @@ -39,6 +51,8 @@ /u-boot.ais /u-boot.dtb /u-boot.sb +/u-boot.bd +/u-boot.geany # # Generated files @@ -50,6 +64,8 @@ /reloc_off /include/generated/ +/include/spl-autoconf.mk +/include/tpl-autoconf.mk asm-offsets.s # stgit generated dirs @@ -71,7 +87,11 @@ cscope.* /ctags /etags -# OneNAND IPL files -/onenand_ipl/onenand-ipl* -/onenand_ipl/board/*/onenand* -/onenand_ipl/board/*/*.S +# gnu global files +GPATH +GRTAGS +GSYMS +GTAGS + +# spl ais files +/spl/*.ais diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 1fee57436..43f2025d2 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -87,7 +87,7 @@ u32 omap_boot_mode(void) u32 omap_boot_device(void) { - return omap3_boot_device; + return BOOT_DEVICE_NAND; } void spl_board_init(void) diff --git a/common/spl/spl.c b/common/spl/spl.c new file mode 100644 index 000000000..2c7ca16dc --- /dev/null +++ b/common/spl/spl.c @@ -0,0 +1,256 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * Aneesh V <aneesh@ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <spl.h> +#include <asm/u-boot.h> +#include <nand.h> +#include <fat.h> +#include <version.h> +#include <i2c.h> +#include <image.h> +#include <malloc.h> +#include <linux/compiler.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_SYS_UBOOT_START +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif +#ifndef CONFIG_SYS_MONITOR_LEN +#define CONFIG_SYS_MONITOR_LEN (200 * 1024) +#endif + +u32 *boot_params_ptr = NULL; +struct spl_image_info spl_image; + +/* Define board data structure */ +static bd_t bdata __attribute__ ((section(".data"))); + +/* + * Default function to determine if u-boot or the OS should + * be started. This implementation always returns 1. + * + * Please implement your own board specific funcion to do this. + * + * RETURN + * 0 to not start u-boot + * positive if u-boot should start + */ +#ifdef CONFIG_SPL_OS_BOOT +__weak int spl_start_uboot(void) +{ + puts("SPL: Please implement spl_start_uboot() for your board\n"); + puts("SPL: Direct Linux boot not active!\n"); + return 1; +} +#endif + +/* + * Weak default function for board specific cleanup/preparation before + * Linux boot. Some boards/platforms might not need it, so just provide + * an empty stub here. + */ +__weak void spl_board_prepare_for_linux(void) +{ + /* Nothing to do! */ +} + +void spl_parse_image_header(const struct image_header *header) +{ + u32 header_size = sizeof(struct image_header); + + if (image_get_magic(header) == IH_MAGIC) { + if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) { + /* + * On some system (e.g. powerpc), the load-address and + * entry-point is located at address 0. We can't load + * to 0-0x40. So skip header in this case. + */ + spl_image.load_addr = image_get_load(header); + spl_image.entry_point = image_get_ep(header); + spl_image.size = image_get_data_size(header); + } else { + spl_image.entry_point = image_get_load(header); + /* Load including the header */ + spl_image.load_addr = spl_image.entry_point - + header_size; + spl_image.size = image_get_data_size(header) + + header_size; + } + spl_image.os = image_get_os(header); + spl_image.name = image_get_name(header); + debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", + sizeof(spl_image.name), spl_image.name, + spl_image.load_addr, spl_image.size); + } else { + /* Signature not found - assume u-boot.bin */ + debug("mkimage signature not found - ih_magic = %x\n", + header->ih_magic); + /* Let's assume U-Boot will not be more than 200 KB */ + spl_image.size = CONFIG_SYS_MONITOR_LEN; + spl_image.entry_point = CONFIG_SYS_UBOOT_START; + spl_image.load_addr = CONFIG_SYS_TEXT_BASE; + spl_image.os = IH_OS_U_BOOT; + spl_image.name = "U-Boot"; + } +} + +__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_noargs_t)(void); + + image_entry_noargs_t image_entry = + (image_entry_noargs_t) spl_image->entry_point; + + debug("image entry point: 0x%X\n", spl_image->entry_point); + image_entry(); +} + +#ifdef CONFIG_SPL_RAM_DEVICE +static void spl_ram_load_image(void) +{ + const struct image_header *header; + + /* + * Get the header. It will point to an address defined by handoff + * which will tell where the image located inside the flash. For + * now, it will temporary fixed to address pointed by U-Boot. + */ + header = (struct image_header *) + (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header)); + + spl_parse_image_header(header); +} +#endif + +void board_init_r(gd_t *dummy1, ulong dummy2) +{ + u32 boot_device; + debug(">>spl:board_init_r()\n"); + +#ifdef CONFIG_SYS_SPL_MALLOC_START + mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, + CONFIG_SYS_SPL_MALLOC_SIZE); +#endif + +#ifndef CONFIG_PPC + /* + * timer_init() does not exist on PPC systems. The timer is initialized + * and enabled (decrementer) in interrupt_init() here. + */ + timer_init(); +#endif + +#ifdef CONFIG_SPL_BOARD_INIT + spl_board_init(); +#endif + + boot_device = spl_boot_device(); + debug("boot device - %d\n", boot_device); + switch (boot_device) { +#ifdef CONFIG_SPL_RAM_DEVICE + case BOOT_DEVICE_RAM: + debug("Booting from RAM\n"); + spl_ram_load_image(); + break; +#endif +#ifdef CONFIG_SPL_MMC_SUPPORT + case BOOT_DEVICE_MMC1: + case BOOT_DEVICE_MMC2: + case BOOT_DEVICE_MMC2_2: + debug("Booting from MMC\n"); + spl_mmc_load_image(); + break; +#endif +#ifdef CONFIG_SPL_NAND_SUPPORT + case BOOT_DEVICE_NAND: + debug("Booting from NAND\n"); + spl_nand_load_image(); + break; +#endif +#ifdef CONFIG_SPL_ONENAND_SUPPORT + case BOOT_DEVICE_ONENAND: + debug("Booting from ONENAND\n"); + spl_onenand_load_image(); + break; +#endif +#ifdef CONFIG_SPL_NOR_SUPPORT + case BOOT_DEVICE_NOR: + debug("Booting from NOR\n"); + spl_nor_load_image(); + break; +#endif +#ifdef CONFIG_SPL_YMODEM_SUPPORT + case BOOT_DEVICE_UART: + debug("Booting from Y modem\n"); + spl_ymodem_load_image(); + break; +#endif +#ifdef CONFIG_SPL_SPI_SUPPORT + case BOOT_DEVICE_SPI: + debug("Booting from SPI\n"); + spl_spi_load_image(); + break; +#endif +#ifdef CONFIG_SPL_ETH_SUPPORT + case BOOT_DEVICE_CPGMAC: +#ifdef CONFIG_SPL_ETH_DEVICE + debug("Booting from ETH\n"); + spl_net_load_image(CONFIG_SPL_ETH_DEVICE); +#else + spl_net_load_image(NULL); +#endif + break; +#endif +#ifdef CONFIG_SPL_USBETH_SUPPORT + case BOOT_DEVICE_USBETH: + debug("Booting from USB ETHER\"); + spl_net_load_image("usb_ether"); + break; +#endif + default: + debug("SPL: Un-supported Boot Device\n"); + hang(); + } + + switch (spl_image.os) { + case IH_OS_U_BOOT: + debug("Jumping to U-Boot\n"); + break; +#ifdef CONFIG_SPL_OS_BOOT + case IH_OS_LINUX: + debug("Jumping to Linux\n"); + spl_board_prepare_for_linux(); + jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR); +#endif + default: + debug("Unsupported OS image.. Jumping nevertheless..\n"); + } + jump_to_image_no_args(&spl_image); +} + +/* + * This requires UART clocks to be enabled. In order for this to work the + * caller must ensure that the gd pointer is valid. + */ +void preloader_console_init(void) +{ + gd->bd = &bdata; + gd->baudrate = CONFIG_BAUDRATE; + + serial_init(); /* serial communications setup */ + + gd->have_console = 1; + + puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ + U_BOOT_TIME ")\n"); +#ifdef CONFIG_SPL_DISPLAY_PRINT + spl_display_print(); +#endif +} diff --git a/include/configs/omap3_h1.h b/include/configs/omap3_h1.h index 8f57a72c5..ee599f0e0 100644 --- a/include/configs/omap3_h1.h +++ b/include/configs/omap3_h1.h @@ -32,13 +32,13 @@ #define CONFIG_DISPLAY_BOARDINFO 1 /* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_OSCK 12000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R +#define CONFIG_MISC_INIT_R /* misc_init_r() function for platform */ -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ +#define CONFIG_OF_LIBFDT /* FDT support */ +#define CONFIG_CMD_BOOTZ /* zImage support */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -267,8 +267,6 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_OMAP3_SPI - #define CONFIG_SYS_CACHELINE_SIZE 64 /* Defines for SPL */ @@ -300,8 +298,8 @@ /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 -#define CONFIG_SYS_NAND_PAGE_SIZE 1024 -#define CONFIG_SYS_NAND_OOBSIZE 32 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ |