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| author | Stefan Roese <sr@denx.de> | 2008-08-13 06:47:12 +0200 | 
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-08-13 06:47:12 +0200 | 
| commit | 5a7ddf4e1fb9347f783eb1473c30187d7a22bd81 (patch) | |
| tree | 5e30fc06d7bbd5b382b1a7b89f57cd81a5246f32 /nand_spl/nand_boot_fsl_elbc.c | |
| parent | 9939ffd5fbf1f5aff4d8172531d4fc33797c62c8 (diff) | |
| parent | 8641ff266ae6638da201747c239fd39ba34c4958 (diff) | |
| download | olio-uboot-2014.01-5a7ddf4e1fb9347f783eb1473c30187d7a22bd81.tar.xz olio-uboot-2014.01-5a7ddf4e1fb9347f783eb1473c30187d7a22bd81.zip | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'nand_spl/nand_boot_fsl_elbc.c')
| -rw-r--r-- | nand_spl/nand_boot_fsl_elbc.c | 150 | 
1 files changed, 150 insertions, 0 deletions
| diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c new file mode 100644 index 000000000..0d2378ee8 --- /dev/null +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -0,0 +1,150 @@ +/* + * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine + * + * (C) Copyright 2006-2008 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * Copyright (c) 2008 Freescale Semiconductor, Inc. + * Author: Scott Wood <scottwood@freescale.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/immap_83xx.h> +#include <asm/fsl_lbc.h> +#include <linux/mtd/nand.h> + +#define WINDOW_SIZE 8192 + +static void nand_wait(void) +{ +	lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000); + +	for (;;) { +		uint32_t status = in_be32(®s->ltesr); + +		if (status == 1) +			return; + +		if (status & 1) { +			puts("read failed (ltesr)\n"); +			for (;;); +		} +	} +} + +static void nand_load(unsigned int offs, int uboot_size, uchar *dst) +{ +	lbus83xx_t *regs = (lbus83xx_t *)(CFG_IMMR + 0x5000); +	uchar *buf = (uchar *)CFG_NAND_BASE; +	int large = in_be32(®s->bank[0].or) & OR_FCM_PGS; +	int block_shift = large ? 17 : 14; +	int block_size = 1 << block_shift; +	int page_size = large ? 2048 : 512; +	int bad_marker = large ? page_size + 0 : page_size + 5; +	int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2; +	int pos = 0; + +	if (offs & (block_size - 1)) { +		puts("bad offset\n"); +		for (;;); +	} + +	if (large) { +		fmr |= FMR_ECCM; +		out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | +		                     (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); +		out_be32(®s->fir, +		         (FIR_OP_CW0 << FIR_OP0_SHIFT) | +		         (FIR_OP_CA  << FIR_OP1_SHIFT) | +		         (FIR_OP_PA  << FIR_OP2_SHIFT) | +		         (FIR_OP_CW1 << FIR_OP3_SHIFT) | +		         (FIR_OP_RBW << FIR_OP4_SHIFT)); +	} else { +		out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); +		out_be32(®s->fir, +		         (FIR_OP_CW0 << FIR_OP0_SHIFT) | +		         (FIR_OP_CA  << FIR_OP1_SHIFT) | +		         (FIR_OP_PA  << FIR_OP2_SHIFT) | +		         (FIR_OP_RBW << FIR_OP3_SHIFT)); +	} + +	out_be32(®s->fbcr, 0); +	clrsetbits_be32(®s->bank[0].br, BR_DECC, BR_DECC_CHK_GEN); + +	while (pos < uboot_size) { +		int i = 0; +		out_be32(®s->fbar, offs >> block_shift); + +		do { +			int j; +			unsigned int page_offs = (offs & (block_size - 1)) << 1; + +			out_be32(®s->ltesr, ~0); +			out_be32(®s->lteatr, 0); +			out_be32(®s->fpar, page_offs); +			out_be32(®s->fmr, fmr); +			out_be32(®s->lsor, 0); +			nand_wait(); + +			page_offs %= WINDOW_SIZE; + +			/* +			 * If either of the first two pages are marked bad, +			 * continue to the next block. +			 */ +			if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) { +				puts("skipping\n"); +				offs = (offs + block_size) & ~(block_size - 1); +				pos &= ~(block_size - 1); +				break; +			} + +			for (j = 0; j < page_size; j++) +				dst[pos + j] = buf[page_offs + j]; + +			pos += page_size; +			offs += page_size; +		} while (offs & (block_size - 1)); +	} +} + +/* + * The main entry for NAND booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from NAND into SDRAM and starts it from there. + */ +void nand_boot(void) +{ +	__attribute__((noreturn)) void (*uboot)(void); + +	udelay(1000000); + +	/* +	 * Load U-Boot image from NAND into RAM +	 */ +	nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE, +	          (uchar *)CFG_NAND_U_BOOT_DST); + +	/* +	 * Jump to U-Boot image +	 */ +	puts("transfering control\n"); +	uboot = (void *)CFG_NAND_U_BOOT_START; +	uboot(); +} |