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| author | Stefan Roese <sr@denx.de> | 2007-12-27 19:37:26 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-12-27 19:37:26 +0100 |
| commit | bb701283a8dcb2521000fe437f19a83cadc98b02 (patch) | |
| tree | c8fe6881bf3b607b18b098009a64650357e848f5 /include/asm-ppc/io.h | |
| parent | b568fd25574181a3b12ae3d66b2913903442cb83 (diff) | |
| parent | 0dcfe3a225a9436fc514f374a19242c672f1172b (diff) | |
| download | olio-uboot-2014.01-bb701283a8dcb2521000fe437f19a83cadc98b02.tar.xz olio-uboot-2014.01-bb701283a8dcb2521000fe437f19a83cadc98b02.zip | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2
Diffstat (limited to 'include/asm-ppc/io.h')
| -rw-r--r-- | include/asm-ppc/io.h | 58 |
1 files changed, 57 insertions, 1 deletions
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 11dfa1c57..91c9c1e4c 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -121,13 +121,43 @@ static inline void isync(void) #define iobarrier_w() eieio() /* + * Non ordered and non-swapping "raw" accessors + */ +#define __iomem +#define PCI_FIX_ADDR(addr) (addr) + +static inline unsigned char __raw_readb(const volatile void __iomem *addr) +{ + return *(volatile unsigned char *)PCI_FIX_ADDR(addr); +} +static inline unsigned short __raw_readw(const volatile void __iomem *addr) +{ + return *(volatile unsigned short *)PCI_FIX_ADDR(addr); +} +static inline unsigned int __raw_readl(const volatile void __iomem *addr) +{ + return *(volatile unsigned int *)PCI_FIX_ADDR(addr); +} +static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) +{ + *(volatile unsigned char *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) +{ + *(volatile unsigned short *)PCI_FIX_ADDR(addr) = v; +} +static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) +{ + *(volatile unsigned int *)PCI_FIX_ADDR(addr) = v; +} + +/* * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. * * Read operations have additional twi & isync to make sure the read * is actually performed (i.e. the data has come back) before we start * executing any following instructions. */ -#define __iomem extern inline int in_8(const volatile unsigned char __iomem *addr) { int ret; @@ -208,4 +238,30 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } +/* + * Given a physical address and a length, return a virtual address + * that can be used to access the memory range with the caching + * properties specified by "flags". + */ +typedef unsigned long phys_addr_t; + +#define MAP_NOCACHE (0) +#define MAP_WRCOMBINE (0) +#define MAP_WRBACK (0) +#define MAP_WRTHROUGH (0) + +static inline void * +map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) +{ + return (void *)paddr; +} + +/* + * Take down a mapping set up by map_physmem(). + */ +static inline void unmap_physmem(void *vaddr, unsigned long flags) +{ + +} + #endif |