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| author | Wolfgang Denk <wd@denx.de> | 2008-11-18 21:40:38 +0100 | 
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-11-18 21:40:38 +0100 | 
| commit | e0b0ec843085f96f4fe0738424835ee90e58bc00 (patch) | |
| tree | 1136f04350b8fb4dcce0d94e69024e64ad0b5605 /cpu/mpc86xx/mp.c | |
| parent | edf3fe7d39a1ee07353128af5221422ce9ccfad6 (diff) | |
| parent | 3f510db522d160179dff3ddcce9b18f6241c2c24 (diff) | |
| download | olio-uboot-2014.01-e0b0ec843085f96f4fe0738424835ee90e58bc00.tar.xz olio-uboot-2014.01-e0b0ec843085f96f4fe0738424835ee90e58bc00.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx
Diffstat (limited to 'cpu/mpc86xx/mp.c')
| -rw-r--r-- | cpu/mpc86xx/mp.c | 68 | 
1 files changed, 68 insertions, 0 deletions
| diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c new file mode 100644 index 000000000..5014401dd --- /dev/null +++ b/cpu/mpc86xx/mp.c @@ -0,0 +1,68 @@ +#include <common.h> +#include <asm/processor.h> +#include <asm/mmu.h> +#include <ioports.h> +#include <lmb.h> +#include <asm/io.h> +#include "mp.h" + +DECLARE_GLOBAL_DATA_PTR; + +#if (CONFIG_NUM_CPUS > 1) +void cpu_mp_lmb_reserve(struct lmb *lmb) +{ +	u32 bootpg; + +	/* if we have 4G or more of memory, put the boot page at 4Gb-1M */ +	if ((u64)gd->ram_size > 0xfffff000) +		bootpg = 0xfff00000; +	else +		bootpg = gd->ram_size - (1024 * 1024); + +	/* tell u-boot we stole a page */ +	lmb_reserve(lmb, bootpg, 4096); +} + +/* + * Copy the code for other cpus to execute into an + * aligned location accessible via BPTR + */ +void setup_mp(void) +{ +	extern ulong __secondary_start_page; +	ulong fixup = (ulong)&__secondary_start_page; +	u32 bootpg; +	u32 bootpg_va; + +	/* +	 * If we have 4G or more of memory, put the boot page at 4Gb-1M. +	 * Otherwise, put it at the very end of RAM. +	 */ +	if (gd->ram_size > 0xfffff000) +		bootpg = 0xfff00000; +	else +		bootpg = gd->ram_size - (1024 * 1024); + +	if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) { +		/* We're not covered by the DDR mapping, set up BAT  */ +		write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K | +			  BATU_VS | BATU_VP, +			  bootpg | BATL_PP_RW | BATL_MEMCOHERENCE); +		bootpg_va = CONFIG_SYS_SCRATCH_VA; +	} else { +		bootpg_va = bootpg; +	} + +	memcpy((void *)bootpg_va, (void *)fixup, 4096); +	flush_cache(bootpg_va, 4096); + +	/* remove the temporary BAT mapping */ +	if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE) +		write_bat(DBAT7, 0, 0); + +	/* If the physical location of bootpg is not at fff00000, set BPTR */ +	if (bootpg != 0xfff00000) +		out_be32((uint *)(CONFIG_SYS_CCSRBAR + 0x20), 0x80000000 | +			 (bootpg >> 12)); +} +#endif |