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| author | Wolfgang Denk <wd@denx.de> | 2007-05-16 01:12:04 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-05-16 01:12:04 +0200 |
| commit | 256176d3d5462d466e2c8434281ced50257c8add (patch) | |
| tree | df286b05bb197dfd92308258bd723aeef3581f90 /cpu/mpc83xx/spd_sdram.c | |
| parent | d62f64cc23a940eafe712c776b3249e4160753d1 (diff) | |
| parent | 068aab660bc3912b930be5540e6b3f3fd6ad3c96 (diff) | |
| download | olio-uboot-2014.01-256176d3d5462d466e2c8434281ced50257c8add.tar.xz olio-uboot-2014.01-256176d3d5462d466e2c8434281ced50257c8add.zip | |
Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx
Diffstat (limited to 'cpu/mpc83xx/spd_sdram.c')
| -rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index d9b8753ca..647813f68 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -58,8 +58,8 @@ picos_to_clk(int picos) int clks; ddr_bus_clk = gd->ddr_clk >> 1; - clks = picos / ((1000000000 / ddr_bus_clk) * 1000); - if (picos % ((1000000000 / ddr_bus_clk) * 1000) != 0) + clks = picos / (1000000000 / (ddr_bus_clk / 1000)); + if (picos % (1000000000 / (ddr_bus_clk / 1000)) != 0) clks++; return clks; @@ -624,7 +624,7 @@ long int spd_sdram() | (1 << (16 + 10)) /* DQS Differential disable */ | (add_lat << (16 + 3)) /* Additive Latency in EMRS1 */ | (mode_odt_enable << 16) /* ODT Enable in EMRS1 */ - | ((twr_clk >> 1) << 9) /* Write Recovery Autopre */ + | ((twr_clk - 1) << 9) /* Write Recovery Autopre */ | (caslat << 4) /* caslat */ | (burstlen << 0) /* Burst length */ ); @@ -693,11 +693,6 @@ long int spd_sdram() #ifdef CFG_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */ ddr->sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL; -#else - /* SS_EN = 0, source synchronous disable - * CLK_ADJST = 0, MCK/MCK# is launched aligned with addr/cmd - */ - ddr->sdram_clk_cntl = 0x00000000; #endif debug("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl); |