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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-11-29 00:56:37 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2007-11-29 00:56:37 +0900 |
| commit | 7fc792895be3c0edf423c4038992b40345672a12 (patch) | |
| tree | 6247dce2d1e72aa17fd2d7a138af66158d02f319 /board/motionpro/motionpro.c | |
| parent | eda3e1e6619ad0bee94ae4b16c99d88e77e2af13 (diff) | |
| parent | f92edbd8a0ef16a2b9127cbb564c09685728e4b0 (diff) | |
| download | olio-uboot-2014.01-7fc792895be3c0edf423c4038992b40345672a12.tar.xz olio-uboot-2014.01-7fc792895be3c0edf423c4038992b40345672a12.zip | |
Merge git://www.denx.de/git/u-boot
Conflicts:
drivers/Makefile
Diffstat (limited to 'board/motionpro/motionpro.c')
| -rw-r--r-- | board/motionpro/motionpro.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index f83998e5a..68257b861 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -138,6 +138,12 @@ long int initdram(int board_type) #ifndef CFG_RAMBOOT ulong test1, test2; + /* According to AN3221 (MPC5200B SDRAM Initialization and + * Configuration), the SDelay register must be written a value of + * 0x00000004 as the first step of the SDRAM contorller configuration. + */ + *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; + /* configure SDRAM start/end for detection */ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |