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| author | Wolfgang Denk <wd@denx.de> | 2012-04-30 16:45:59 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2012-04-30 16:45:59 +0200 |
| commit | 05f132d74d173854df79bc5541699c3db144e42a (patch) | |
| tree | 7068aef1bd8453964440df9d9e20a0789ba9a7f4 /board/freescale/p2041rdb/p2041rdb.c | |
| parent | 3f8550c5e93c65433d51c711e5d8d58fa5dfde7d (diff) | |
| parent | 5f6db68b42024b51a9a1fddd7d4371d2af82c090 (diff) | |
| download | olio-uboot-2014.01-05f132d74d173854df79bc5541699c3db144e42a.tar.xz olio-uboot-2014.01-05f132d74d173854df79bc5541699c3db144e42a.zip | |
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
Diffstat (limited to 'board/freescale/p2041rdb/p2041rdb.c')
| -rw-r--r-- | board/freescale/p2041rdb/p2041rdb.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 1f6a34b3d..976c8d290 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -54,10 +54,6 @@ int checkboard(void) sw = CPLD_READ(fbank_sel); printf("vBank: %d\n", sw & 0x1); -#ifdef CONFIG_PHYS_64BIT - puts("36-bit Addressing\n"); -#endif - /* * Display the RCW, so that no one gets confused as to what RCW * we're actually using for this boot. |