Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master

* 'master' of ssh://gemini/home/wd/git/u-boot/master:
  board/emk/top860/top860.c: Fix GCC 4.6 build warning
  board/sbc405/strataflash.c: Fix GCC 4.6 build warning
  arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warning
  board/freescale/mpc8610hpcd/mpc8610hpcd.c: Fix GCC 4.6 build warning
  board/mpl/common/flash.c: Fix GCC 4.6 build warning
  post/board/lwmon5/gdc.c: Fix GCC 4.6 build warning
  drivers/usb/host/sl811-hcd.c: Fix GCC 4.6 build warning
  board/sandburst/common/flash.c: Fix GCC 4.6 build warning
  DB64460: Fix GCC 4.6 build warnings
  DB64360: Fix GCC 4.6 build warnings
  board/cray/L1/flash.c: Fix GCC 4.6 build warning
  drivers/block/sata_dwc.c: Fix GCC 4.6 build warning
  board/amirix/ap1000/flash.c: Fix GCC 4.6 build warning
  alpr board: Fix GCC 4.6 build warnings
  image: Don't detect XIP images as overlapping.
  image: Implement IH_TYPE_KERNEL_NOLOAD
  ppc4xx: Add Io64 board support
  ppc4xx: fix PMC440 painit command
  ppc4xx: remove invalid access to PCI_BRDGOPT2 register
  ppc4xx: use CONFIG_PCI_BOOTDELAY instead of private implementation
  mpc85xx: support for Freescale COM Express P2020
  arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
  mpc85xx: support board-specific reset function
  powerpc/85xx: verify the localbus device tree address before booting the OS
  mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
  powerpc/p3060qds: Add board related support for P3060QDS platform
  powerpc/85xx: clean up and document the QE/FMAN microcode macros
  powerpc/85xx: always implement the work-around for Erratum SATA_A001
  powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
  powerpc/85xx: Add workaround for erratum A-003474
  powerpc/85xx: fixup flexcan device tree clock-frequency
  powerpc/85xx: Add workaround for erratum CPU-A003999
  x86: Fix some bugs in the i8402 driver when no controller is present
  x86: Make the i8042 driver checkpatch clean
  x86: Wrap small helper functions from libgcc to avoid an ABI mismatch
  x86: Import the glibc memset implementation
  x86: Fix a few recently added bugs
  x86: Don't relocate symbols which point to things that aren't relocated
  x86: Fix how the location of the realmode and bios blobs are calculated
  x86: Misc cleanups
  x86: Misc PCI touchups
  x86: Ensure IDT and GDT remain 16-byte aligned post relocation
  x86: Provide more configuration granularity
  x86: Add multiboot header
  sc520: Create arch asm-offsets
  x86: Punt cold- and warm-boot flags
  cosmetic: checkpatch cleanup of board/eNET/*.c
  cosmetic: checkpatch cleanup of arch/x86/lib/*.c
  cosmetic: checkpatch cleanup of arch/x86/cpu/sc520/*.c
  cosmetic: checkpatch cleanup of arch/x86/cpu/*.c
  x86: Call hang() on unrecoverable exception
  menu.c: use puts() instead of printf() where possible
  MAKEALL: drop obsolete mx31pdk_nand target
  dataflash: fix parameters order in write_dataflash()
  hawkboard: Replace HAWKBOARD_KICK{0, 1}_UNLOCK defines
  davinci_sonata: define CONFIG_MACH_TYPE for davinci_sonata board
  davinci_schmoogie: define CONFIG_MACH_TYPE for davinci_schmoogie board
  arm: a320evb: define mach-type in board config file
  OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning that.
  Fix Stelian's email address
  DIU: 1080P and 720P support
  CFB: Fix font rendering on mx5 framebuffer

1 files changed, 151 insertions, 0 deletions

diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
new file mode 100644
index 000000000..6cd7e5108
--- /dev/null
+++ b/board/freescale/common/qixis.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2011 Freescale Semiconductor
+ * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This file provides support for the QIXIS of some Freescale reference boards.
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+#include "qixis.h"
+
+u8 qixis_read(unsigned int reg)
+{
+	void *p = (void *)QIXIS_BASE;
+
+	return in_8(p + reg);
+}
+
+void qixis_write(unsigned int reg, u8 value)
+{
+	void *p = (void *)QIXIS_BASE;
+
+	out_8(p + reg, value);
+}
+
+void qixis_reset(void)
+{
+	QIXIS_WRITE(rst_ctl, 0x83);
+}
+
+void qixis_bank_reset(void)
+{
+	QIXIS_WRITE(rcfg_ctl, 0x20);
+	QIXIS_WRITE(rcfg_ctl, 0x21);
+}
+
+/* Set the boot bank to the power-on default bank0 */
+void clear_altbank(void)
+{
+	u8 reg;
+
+	reg = QIXIS_READ(brdcfg[0]);
+	reg = reg & ~QIXIS_LBMAP_MASK;
+	QIXIS_WRITE(brdcfg[0], reg);
+}
+
+/* Set the boot bank to the alternate bank */
+void set_altbank(void)
+{
+	u8 reg;
+
+	reg = QIXIS_READ(brdcfg[0]);
+	reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_ALTBANK;
+	QIXIS_WRITE(brdcfg[0], reg);
+}
+
+#ifdef DEBUG
+static void qixis_dump_regs(void)
+{
+	int i;
+
+	printf("id	= %02x\n", QIXIS_READ(id));
+	printf("arch	= %02x\n", QIXIS_READ(arch));
+	printf("scver	= %02x\n", QIXIS_READ(scver));
+	printf("model	= %02x\n", QIXIS_READ(model));
+	printf("rst_ctl	= %02x\n", QIXIS_READ(rst_ctl));
+	printf("aux	= %02x\n", QIXIS_READ(aux));
+	for (i = 0; i < 16; i++)
+		printf("brdcfg%02d = %02x\n", i, QIXIS_READ(brdcfg[i]));
+	for (i = 0; i < 16; i++)
+		printf("dutcfg%02d = %02x\n", i, QIXIS_READ(dutcfg[i]));
+	printf("sclk	= %02x%02x%02x\n", QIXIS_READ(sclk[0]),
+		QIXIS_READ(sclk[1]), QIXIS_READ(sclk[2]));
+	printf("dclk	= %02x%02x%02x\n", QIXIS_READ(dclk[0]),
+		QIXIS_READ(dclk[1]), QIXIS_READ(dclk[2]));
+	printf("aux     = %02x\n", QIXIS_READ(aux));
+	printf("watch	= %02x\n", QIXIS_READ(watch));
+	printf("ctl_sys	= %02x\n", QIXIS_READ(ctl_sys));
+	printf("rcw_ctl = %02x\n", QIXIS_READ(rcw_ctl));
+	printf("present = %02x\n", QIXIS_READ(present));
+	printf("clk_spd = %02x\n", QIXIS_READ(clk_spd));
+	printf("stat_dut = %02x\n", QIXIS_READ(stat_dut));
+	printf("stat_sys = %02x\n", QIXIS_READ(stat_sys));
+	printf("stat_alrm = %02x\n", QIXIS_READ(stat_alrm));
+	printf("ctl_sys2 = %02x\n", QIXIS_READ(ctl_sys2));
+}
+#endif
+
+int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	int i;
+
+	if (argc <= 1) {
+		clear_altbank();
+		qixis_reset();
+	} else if (strcmp(argv[1], "altbank") == 0) {
+		set_altbank();
+		qixis_bank_reset();
+	} else if (strcmp(argv[1], "watchdog") == 0) {
+		static char *period[9] = {"2s", "4s", "8s", "16s", "32s",
+					  "1min", "2min", "4min", "8min"};
+		u8 rcfg = QIXIS_READ(rcfg_ctl);
+
+		if (argv[2] == NULL) {
+			printf("qixis watchdog <watchdog_period>\n");
+			return 0;
+		}
+		for (i = 0; i < ARRAY_SIZE(period); i++) {
+			if (strcmp(argv[2], period[i]) == 0) {
+				/* disable watchdog */
+				QIXIS_WRITE(rcfg_ctl, rcfg & ~0x08);
+				QIXIS_WRITE(watch, ((i<<2) - 1));
+				QIXIS_WRITE(rcfg_ctl, rcfg);
+				return 0;
+			}
+		}
+	}
+
+#ifdef DEBUG
+	else if (strcmp(argv[1], "dump") == 0) {
+		qixis_dump_regs();
+		return 0;
+	}
+#endif
+
+	else {
+		printf("Invalid option: %s\n", argv[1]);
+		return 1;
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	qixis_reset, CONFIG_SYS_MAXARGS, 1, qixis_reset_cmd,
+	"Reset the board using the FPGA sequencer",
+	"- hard reset to default bank\n"
+	"qixis_reset altbank - reset to alternate bank\n"
+	"qixis watchdog <watchdog_period> - set the watchdog period\n"
+	"	period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n"
+#ifdef DEBUG
+	"qixis_reset dump - display the QIXIS registers\n"
+#endif
+	);