diff options
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2011-11-22 16:51:13 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-29 08:48:06 -0600 |
| commit | ae6b03fefc1a8b27d834ef12e0a586f4237fdb1f (patch) | |
| tree | 4eefe39f8dc470c3caaa36ec3327328aa126951f /board/freescale/common/ics307_clk.c | |
| parent | f2717b47eac74fe262d89c6d8f6bb5a047a77229 (diff) | |
| download | olio-uboot-2014.01-ae6b03fefc1a8b27d834ef12e0a586f4237fdb1f.tar.xz olio-uboot-2014.01-ae6b03fefc1a8b27d834ef12e0a586f4237fdb1f.zip | |
powerpc/p3060qds: Add board related support for P3060QDS platform
The P3060QDS is a Freescale reference board for the six-core P3060 SOC.
P3060QDS Board Overview:
Memory subsystem:
- 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
- 128M Bytes NOR flash single-chip memory
- 16M Bytes SPI flash
- 8K Bytes AT24C64 I2C EEPROM for RCW
Ethernet:
- Eight Ethernet controllers (4x1G + 4x1G/2.5G)
- Three VSC8641 PHYs on board (2xRGMII + 1xMII)
- Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
PCIe: Two PCI Express 2.0 controllers/ports
USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
I2C: Four I2C controllers
UART: Supports two dUARTs up to 115200 bps for console
RapidIO: Two RapidIO, sRIO1 and sRIO2
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/common/ics307_clk.c')
| -rw-r--r-- | board/freescale/common/ics307_clk.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index 6acbc361a..95a3cd778 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -25,10 +25,15 @@ #include "ics307_clk.h" -#ifdef CONFIG_FSL_NGPIXIS +#if defined(CONFIG_FSL_NGPIXIS) #include "ngpixis.h" +#define fpga_reg pixis +#elif defined(CONFIG_FSL_QIXIS) +#include "qixis.h" +#define fpga_reg ((struct qixis *)QIXIS_BASE) #else #include "pixis.h" +#define fpga_reg pixis #endif /* define for SYS CLK or CLK1Frequency */ @@ -143,15 +148,15 @@ static unsigned long ics307_clk_freq(u8 cw0, u8 cw1, u8 cw2) unsigned long get_board_sys_clk(void) { return ics307_clk_freq( - in_8(&pixis->sclk[0]), - in_8(&pixis->sclk[1]), - in_8(&pixis->sclk[2])); + in_8(&fpga_reg->sclk[0]), + in_8(&fpga_reg->sclk[1]), + in_8(&fpga_reg->sclk[2])); } unsigned long get_board_ddr_clk(void) { return ics307_clk_freq( - in_8(&pixis->dclk[0]), - in_8(&pixis->dclk[1]), - in_8(&pixis->dclk[2])); + in_8(&fpga_reg->dclk[0]), + in_8(&fpga_reg->dclk[1]), + in_8(&fpga_reg->dclk[2])); } |