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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/esd/common/fpga.c | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | olio-uboot-2014.01-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.xz olio-uboot-2014.01-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/esd/common/fpga.c')
| -rw-r--r-- | board/esd/common/fpga.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c index 9e2be7eaf..5232dddc9 100644 --- a/board/esd/common/fpga.c +++ b/board/esd/common/fpga.c @@ -36,12 +36,12 @@ #define MAX_ONES 226 -#ifdef CFG_FPGA_PRG -# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output) */ -# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */ -# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */ -# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */ -# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */ +#ifdef CONFIG_SYS_FPGA_PRG +# define FPGA_PRG CONFIG_SYS_FPGA_PRG /* FPGA program pin (ppc output) */ +# define FPGA_CLK CONFIG_SYS_FPGA_CLK /* FPGA clk pin (ppc output) */ +# define FPGA_DATA CONFIG_SYS_FPGA_DATA /* FPGA data pin (ppc output) */ +# define FPGA_DONE CONFIG_SYS_FPGA_DONE /* FPGA done pin (ppc input) */ +# define FPGA_INIT CONFIG_SYS_FPGA_INIT /* FPGA init pin (ppc input) */ #else # define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */ # define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */ @@ -98,7 +98,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) int count; unsigned char b; -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 int j; #else int bit; @@ -112,7 +112,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) index += len + 3; } -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* search for preamble 0xFFFFFFFF */ while (1) { if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff) @@ -186,7 +186,7 @@ static int fpga_boot (const unsigned char *fpgadata, int size) DBG ("write configuration data into fpga\n"); /* write configuration-data into fpga... */ -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* * Load uncompressed image into fpga */ |