diff options
| author | York Sun <yorksun@freescale.com> | 2012-10-08 07:44:15 +0000 | 
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 14:31:19 -0500 | 
| commit | d1001e3f0ce0059a55a870c42bac8aba2e4befec (patch) | |
| tree | bb8dd7437496f9705ab0dbd59460ed3ce60a57f4 /arch/powerpc/include/asm/immap_85xx.h | |
| parent | fd3cebd020edad5fa18ff5a64cde3aa75aa896c8 (diff) | |
| download | olio-uboot-2014.01-d1001e3f0ce0059a55a870c42bac8aba2e4befec.tar.xz olio-uboot-2014.01-d1001e3f0ce0059a55a870c42bac8aba2e4befec.zip | |
powerpc/corenet2: Add SerDes for corenet2
Create new files to handle 2nd generation Chassis as the registers are
organized differently.
 - Add SerDes protocol parsing and detection
 - Add support of 4 SerDes
 - Add CPRI protocol in fsl_serdes.h
	The Common Public Radio Interface (CPRI) is publicly available
	specification that standardizes the protocol interface between the
	radio equipment control (REC) and the radio equipment (RE) in wireless
	basestations. This allows interoperability of equipment from different
	vendors,and preserves the software investment made by wireless service
	providers.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 4 | 
1 files changed, 4 insertions, 0 deletions
| diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index cfd86bab4..b1d7e3dff 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2428,6 +2428,8 @@ typedef struct ccsr_gur {  #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2  #define MAX_SERDES 4 +#define SRDS_MAX_LANES 8 +#define SRDS_MAX_BANK 2  typedef struct serdes_corenet {  	struct {  		u32	rstctl;	/* Reset Control Register */ @@ -2494,6 +2496,8 @@ typedef struct serdes_corenet {  #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */ +#define SRDS_MAX_LANES		18 +#define SRDS_MAX_BANK		3  typedef struct serdes_corenet {  	struct {  		u32	rstctl;	/* Reset Control Register */ |