diff options
| author | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 | 
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 | 
| commit | 3e4d27b06d7484040355e22eec2cbce7335d6dab (patch) | |
| tree | 9672a2bb2e4ce0edc0ab776ddf0e2ca8e39a5f62 /arch/powerpc/include/asm/fsl_serdes.h | |
| parent | bad05afe083eec0467220de21683443292c5012e (diff) | |
| parent | 59852d03867108217fe88e3bfc3e1e9cedfe63c5 (diff) | |
| download | olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.tar.xz olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.zip | |
Merge git://git.denx.de/u-boot
Diffstat (limited to 'arch/powerpc/include/asm/fsl_serdes.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_serdes.h | 42 | 
1 files changed, 42 insertions, 0 deletions
| diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index 22525f115..6cd7379c8 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -37,11 +37,17 @@ enum srds_prtcl {  	SGMII_FM1_DTSEC3,  	SGMII_FM1_DTSEC4,  	SGMII_FM1_DTSEC5, +	SGMII_FM1_DTSEC6, +	SGMII_FM1_DTSEC9, +	SGMII_FM1_DTSEC10,  	SGMII_FM2_DTSEC1,  	SGMII_FM2_DTSEC2,  	SGMII_FM2_DTSEC3,  	SGMII_FM2_DTSEC4,  	SGMII_FM2_DTSEC5, +	SGMII_FM2_DTSEC6, +	SGMII_FM2_DTSEC9, +	SGMII_FM2_DTSEC10,  	SGMII_TSEC1,  	SGMII_TSEC2,  	SGMII_TSEC3, @@ -49,13 +55,49 @@ enum srds_prtcl {  	XAUI_FM1,  	XAUI_FM2,  	AURORA, +	CPRI1, +	CPRI2, +	CPRI3, +	CPRI4, +	CPRI5, +	CPRI6, +	CPRI7, +	CPRI8, +	XAUI_FM1_MAC9, +	XAUI_FM1_MAC10, +	XAUI_FM2_MAC9, +	XAUI_FM2_MAC10, +	HIGIG_FM1_MAC9, +	HIGIG_FM1_MAC10, +	HIGIG_FM2_MAC9, +	HIGIG_FM2_MAC10, +	QSGMII_FM1_A,		/* A indicates MACs 1-4 */ +	QSGMII_FM1_B,		/* B indicates MACs 5,6,9,10 */ +	QSGMII_FM2_A, +	QSGMII_FM2_B, +	XFI_FM1_MAC9, +	XFI_FM1_MAC10, +	XFI_FM2_MAC9, +	XFI_FM2_MAC10, +	INTERLAKEN, +}; + +enum srds { +	FSL_SRDS_1  = 0, +	FSL_SRDS_2  = 1, +	FSL_SRDS_3  = 2, +	FSL_SRDS_4  = 3,  };  int is_serdes_configured(enum srds_prtcl device);  void fsl_serdes_init(void);  #ifdef CONFIG_FSL_CORENET +#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 +int serdes_get_first_lane(u32 sd, enum srds_prtcl device); +#else  int serdes_get_first_lane(enum srds_prtcl device); +#endif  #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9  void serdes_reset_rx(enum srds_prtcl device);  #endif |