diff options
| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2010-12-15 17:02:08 +0000 | 
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-03 08:52:14 -0500 | 
| commit | 7065b7d466dfc4fbfa8a608cf21206efe59c01d9 (patch) | |
| tree | b6c9d32bc4be7a818a4b594b9af7e1997ffb28e8 /arch/powerpc/include/asm/fsl_secure_boot.h | |
| parent | 2f439e805e945b410b0043db82f9666eb03914ba (diff) | |
| download | olio-uboot-2014.01-7065b7d466dfc4fbfa8a608cf21206efe59c01d9.tar.xz olio-uboot-2014.01-7065b7d466dfc4fbfa8a608cf21206efe59c01d9.zip | |
powerpc/p4080: Add support for secure boot flow
Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
   (Please note that ISBC expects all these addresses, images to be
    validated, entry point etc within 0 - 3.5G range)
3. ISBC validates the u-boot image, and passes control to u-boot
   at 0xcffffffc.
Changes in u-boot:
1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M
   CONFIG_SYS_PBI_FLASH_WINDOW in AS=1.
   (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash
    created by PBL/configuration word within 0 - 3.5G memory range. The
    u-boot image at this address has been validated by ISBC code)
2. Remove TLB entries for 0 - 3.5G created by ISBC code
3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by
   PBL/configuration word after switch to AS = 1
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Acked-by: Wood Scott-B07421 <B07421@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_secure_boot.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_secure_boot.h | 43 | 
1 files changed, 43 insertions, 0 deletions
| diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h new file mode 100644 index 000000000..d1c1967d1 --- /dev/null +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -0,0 +1,43 @@ +/* + * Copyright 2010-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __FSL_SECURE_BOOT_H +#define __FSL_SECURE_BOOT_H + +/* Starting TLB number for the TLB entried for 3.5 G space created by ISBC */ +#if defined(CONFIG_FSL_CORENET) +#define CONFIG_SYS_ISBC_START_TLB		3 +#else +#define CONFIG_SYS_ISBC_START_TLB		0 +#endif + +/* Number fo TLB's created by ISBC */ +#define CONFIG_SYS_ISBC_NUM_TLBS		5 + +#if defined(CONFIG_FSL_CORENET) +#define CONFIG_SYS_PBI_FLASH_BASE		0xc0000000 +#else +#define CONFIG_SYS_PBI_FLASH_BASE		0xce000000 +#endif +#define CONFIG_SYS_PBI_FLASH_WINDOW		0xcff80000 + +#endif |