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| author | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 |
| commit | 3e4d27b06d7484040355e22eec2cbce7335d6dab (patch) | |
| tree | 9672a2bb2e4ce0edc0ab776ddf0e2ca8e39a5f62 /arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c | |
| parent | bad05afe083eec0467220de21683443292c5012e (diff) | |
| parent | 59852d03867108217fe88e3bfc3e1e9cedfe63c5 (diff) | |
| download | olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.tar.xz olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.zip | |
Merge git://git.denx.de/u-boot
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c index 03a784cd4..9adde3101 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c @@ -11,7 +11,8 @@ #include "ddr.h" -unsigned int +#if defined(CONFIG_FSL_DDR3) +static unsigned int compute_cas_latency_ddr3(const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, unsigned int number_of_dimms) @@ -65,6 +66,7 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params, return 0; } +#endif /* * compute_lowest_common_dimm_parameters() @@ -76,7 +78,7 @@ compute_cas_latency_ddr3(const dimm_params_t *dimm_params, unsigned int compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, common_timing_params_t *outpdimm, - unsigned int number_of_dimms) + const unsigned int number_of_dimms) { unsigned int i, j; @@ -126,13 +128,20 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, temp1++; continue; } + + /* + * check if quad-rank DIMM is plugged if + * CONFIG_CHIP_SELECT_QUAD_CAPABLE is not defined + * Only the board with proper design is capable + */ +#ifndef CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE if (dimm_params[i].n_ranks == 4 && \ CONFIG_CHIP_SELECTS_PER_CTRL/CONFIG_DIMM_SLOTS_PER_CTLR < 4) { printf("Found Quad-rank DIMM, not able to support."); temp1++; continue; } - +#endif /* * Find minimum tCKmax_ps to find fastest slow speed, * i.e., this is the slowest the whole system can go. @@ -236,11 +245,14 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, if (outpdimm->all_DIMMs_registered) for (j = 0; j < 16; j++) { outpdimm->rcw[j] = dimm_params[0].rcw[j]; - for (i = 1; i < number_of_dimms; i++) + for (i = 1; i < number_of_dimms; i++) { + if (!dimm_params[i].n_ranks) + continue; if (dimm_params[i].rcw[j] != dimm_params[0].rcw[j]) { temp1 = 1; break; } + } } if (temp1 != 0) |