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| author | Graeme Russ <graeme.russ@gmail.com> | 2011-04-13 19:43:26 +1000 |
|---|---|---|
| committer | Graeme Russ <graeme.russ@gmail.com> | 2011-04-13 19:43:26 +1000 |
| commit | dbf7115a326fa70ac3e4ca87497c7e21c6642b45 (patch) | |
| tree | 6af884cf4dbe8db63ffb7628487a1b4f7ea9db5e /arch/i386/lib/pci.c | |
| parent | e413554f9df28b383eeb8e8e5de35848b15d74aa (diff) | |
| download | olio-uboot-2014.01-dbf7115a326fa70ac3e4ca87497c7e21c6642b45.tar.xz olio-uboot-2014.01-dbf7115a326fa70ac3e4ca87497c7e21c6642b45.zip | |
x86: Code cleanup
Make the copyright notices in the x86 files consistent and update them with
proper attributions for recent updates
Also fix a few comment style/accuracy and whitespace/blank line issues
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Diffstat (limited to 'arch/i386/lib/pci.c')
| -rw-r--r-- | arch/i386/lib/pci.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/arch/i386/lib/pci.c b/arch/i386/lib/pci.c index 9020e7ce7..e791e88bd 100644 --- a/arch/i386/lib/pci.c +++ b/arch/i386/lib/pci.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2002 - * Daniel Engström, Omicron Ceti AB, daniel@omicron.se + * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> * * See file CREDITS for list of people who contributed to this * project. @@ -54,10 +54,9 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest) class_code &= 0xffffff00; class_code >>= 8; -#if 0 - printf("PCI Header Vendor %04x device %04x class %06x\n", + debug("PCI Header Vendor %04x device %04x class %06x\n", vendor, device, class_code); -#endif + /* Enable the rom addess decoder */ pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK); pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg); @@ -70,13 +69,12 @@ int pci_shadow_rom(pci_dev_t dev, unsigned char *dest) size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1; -#if 0 - printf("ROM is %d bytes\n", size); -#endif + debug("ROM is %d bytes\n", size); + rom_addr = pci_get_rom_window(hose, size); -#if 0 - printf("ROM mapped at %x \n", rom_addr); -#endif + + debug("ROM mapped at %x\n", rom_addr); + pci_write_config_dword(dev, PCI_ROM_ADDRESS, pci_phys_to_mem(dev, rom_addr) |PCI_ROM_ADDRESS_ENABLE); |