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| author | Mugunthan V N <mugunthanvnm@ti.com> | 2013-07-08 16:04:41 +0530 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-07-26 16:39:11 -0400 |
| commit | b1e26e3bfb1d53d4fd713a2a5f11b7ddf2bcaeec (patch) | |
| tree | ec8659574c4ec9856cf3287afed07ec16a5796f2 /arch/arm/include/asm/arch-omap5/omap.h | |
| parent | f986d9720836433ded29f06c8f5aed462bd20924 (diff) | |
| download | olio-uboot-2014.01-b1e26e3bfb1d53d4fd713a2a5f11b7ddf2bcaeec.tar.xz olio-uboot-2014.01-b1e26e3bfb1d53d4fd713a2a5f11b7ddf2bcaeec.zip | |
ARM: DRA7xx: Add CPSW support to DRA7xx EVM
Adding support for CPSW Ethernet support found in DRA7xx EVM
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/omap.h')
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index d08fcff8b..597c692b9 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -192,6 +192,27 @@ struct s32ktimer { #define OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK (0x1 << 10) #define OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK (0x1f << 0) +/* IO Delay module defines */ +#define CFG_IO_DELAY_BASE 0x4844A000 +#define CFG_IO_DELAY_LOCK (CFG_IO_DELAY_BASE + 0x02C) + +/* CPSW IO Delay registers*/ +#define CFG_RGMII0_TXCTL (CFG_IO_DELAY_BASE + 0x74C) +#define CFG_RGMII0_TXD0 (CFG_IO_DELAY_BASE + 0x758) +#define CFG_RGMII0_TXD1 (CFG_IO_DELAY_BASE + 0x764) +#define CFG_RGMII0_TXD2 (CFG_IO_DELAY_BASE + 0x770) +#define CFG_RGMII0_TXD3 (CFG_IO_DELAY_BASE + 0x77C) +#define CFG_VIN2A_D13 (CFG_IO_DELAY_BASE + 0xA7C) +#define CFG_VIN2A_D17 (CFG_IO_DELAY_BASE + 0xAAC) +#define CFG_VIN2A_D16 (CFG_IO_DELAY_BASE + 0xAA0) +#define CFG_VIN2A_D15 (CFG_IO_DELAY_BASE + 0xA94) +#define CFG_VIN2A_D14 (CFG_IO_DELAY_BASE + 0xA88) + +#define CFG_IO_DELAY_UNLOCK_KEY 0x0000AAAA +#define CFG_IO_DELAY_LOCK_KEY 0x0000AAAB +#define CFG_IO_DELAY_ACCESS_PATTERN 0x00029000 +#define CFG_IO_DELAY_LOCK_MASK 0x400 + #ifndef __ASSEMBLY__ struct srcomp_params { s8 divide_factor; @@ -208,5 +229,10 @@ struct ctrl_ioregs { u32 ctrl_emif_sdram_config_ext; u32 ctrl_ddr_ctrl_ext_0; }; + +struct io_delay { + u32 addr; + u32 dly; +}; #endif /* __ASSEMBLY__ */ #endif |