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authorTom Rini <trini@ti.com>2013-09-06 20:25:35 -0400
committerTom Rini <trini@ti.com>2013-09-06 20:25:35 -0400
commit47f75cf2e1d8648e3438630f3a4bddf9b5caa25d (patch)
tree1d0f8f8943d44245381f255a059e258c696bc5a8 /arch/arm/include/asm/arch-omap5/omap.h
parent1affd4d4a3fe512050e1ad1636d9360c670da531 (diff)
parent68e1747f9c0506159e8ecc9a4feb58e9c65a7b39 (diff)
downloadolio-uboot-2014.01-47f75cf2e1d8648e3438630f3a4bddf9b5caa25d.tar.xz
olio-uboot-2014.01-47f75cf2e1d8648e3438630f3a4bddf9b5caa25d.zip
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/omap.h')
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 597c692b9..e9a51d340 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -153,6 +153,15 @@ struct s32ktimer {
#define EFUSE_4 0x45145100
#endif /* __ASSEMBLY__ */
+/*
+ * In all cases, the TRM defines the RAM Memory Map for the processor
+ * and indicates the area for the downloaded image. We use all of that
+ * space for download and once up and running may use other parts of the
+ * map for our needs. We set a scratch space that is at the end of the
+ * OMAP5 download area, but within the DRA7xx download area (as it is
+ * much larger) and do not, at this time, make use of the additional
+ * space.
+ */
#ifdef CONFIG_DRA7XX
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
@@ -160,7 +169,7 @@ struct s32ktimer {
#define NON_SECURE_SRAM_START 0x40300000
#define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */
#endif
-#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
+#define SRAM_SCRATCH_SPACE_ADDR 0x4031E000
/* base address for indirect vectors (internal boot mode) */
#define SRAM_ROM_VECT_BASE 0x4031F000