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| author | Wolfgang Denk <wd@denx.de> | 2010-09-09 21:39:46 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-09-09 21:39:46 +0200 |
| commit | 8fea51a4acb0c7da6fb375c9a708c50c0a1b66ad (patch) | |
| tree | f6a3d36e35f8f4d1009c367417e918c210b0baf0 /arch/arm/include/asm/arch-at91/at91_eefc.h | |
| parent | 40e74c852b76accfe27d832f23ea3020352bc120 (diff) | |
| parent | ec99d983418897b120409f71712d41c01a21bf7c (diff) | |
| download | olio-uboot-2014.01-8fea51a4acb0c7da6fb375c9a708c50c0a1b66ad.tar.xz olio-uboot-2014.01-8fea51a4acb0c7da6fb375c9a708c50c0a1b66ad.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-at91/at91_eefc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-at91/at91_eefc.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-at91/at91_eefc.h b/arch/arm/include/asm/arch-at91/at91_eefc.h new file mode 100644 index 000000000..d45b3deca --- /dev/null +++ b/arch/arm/include/asm/arch-at91/at91_eefc.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2010 + * Reinhard Meyer, reinhard.meyer@emk-elektronik.de + * + * Enhanced Embedded Flash Controller + * Based on AT91SAM9XE datasheet + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_EEFC_H +#define AT91_EEFC_H + +#ifndef __ASSEMBLY__ + +typedef struct at91_eefc { + u32 fmr; /* Flash Mode Register RW */ + u32 fcr; /* Flash Command Register WO */ + u32 fsr; /* Flash Status Register RO */ + u32 frr; /* Flash Result Register RO */ +} at91_eefc_t; + +#endif /* __ASSEMBLY__ */ + +#define AT91_EEFC_FMR_FWS_MASK 0x00000f00 +#define AT91_EEFC_FMR_FRDY_BIT 0x00000001 + +#define AT91_EEFC_FCR_KEY 0x5a000000 +#define AT91_EEFC_FCR_FARG_MASK 0x00ffff00 +#define AT91_EEFC_FCR_FARG_SHIFT 8 +#define AT91_EEFC_FCR_FCMD_GETD 0x0 +#define AT91_EEFC_FCR_FCMD_WP 0x1 +#define AT91_EEFC_FCR_FCMD_WPL 0x2 +#define AT91_EEFC_FCR_FCMD_EWP 0x3 +#define AT91_EEFC_FCR_FCMD_EWPL 0x4 +#define AT91_EEFC_FCR_FCMD_EA 0x5 +#define AT91_EEFC_FCR_FCMD_SLB 0x8 +#define AT91_EEFC_FCR_FCMD_CLB 0x9 +#define AT91_EEFC_FCR_FCMD_GLB 0xA +#define AT91_EEFC_FCR_FCMD_SGPB 0xB +#define AT91_EEFC_FCR_FCMD_CGPB 0xC +#define AT91_EEFC_FCR_FCMD_GGPB 0xD + +#define AT91_EEFC_FSR_FRDY 1 +#define AT91_EEFC_FSR_FCMDE 2 +#define AT91_EEFC_FSR_FLOCKE 4 + +#endif |