diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2011-01-25 12:42:32 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-04 09:24:40 -0500 |
| commit | fbee0f7f09e94c0967ac118d41388c3edb0c226d (patch) | |
| tree | fc6a52f32e70fad6c11d7076b1b4805e8106aa97 | |
| parent | eea9a123449c34fa1631e7869aae94dbe3b61dbd (diff) | |
| download | olio-uboot-2014.01-fbee0f7f09e94c0967ac118d41388c3edb0c226d.tar.xz olio-uboot-2014.01-fbee0f7f09e94c0967ac118d41388c3edb0c226d.zip | |
powerpc/85xx: Add some defines for P2040, P3041, P5010, P5020
Specify the number of DDR controllers, number of frame managers, number
of 1g and 10g ports.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 6c16681b7..53703f656 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -156,11 +156,18 @@ #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 5 +#define CONFIG_NUM_DDR_CONTROLLERS 1 #elif defined(CONFIG_PPC_P3041) #define CONFIG_MAX_CPUS 4 #define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 5 +#define CONFIG_SYS_NUM_FM1_10GEC 1 +#define CONFIG_NUM_DDR_CONTROLLERS 1 #elif defined(CONFIG_PPC_P4040) #define CONFIG_MAX_CPUS 4 @@ -191,11 +198,19 @@ #define CONFIG_MAX_CPUS 1 #define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 5 +#define CONFIG_SYS_NUM_FM1_10GEC 1 +#define CONFIG_NUM_DDR_CONTROLLERS 1 #elif defined(CONFIG_PPC_P5020) #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_NUM_LAWS 32 #define CONFIG_SYS_FSL_SEC_COMPAT 4 +#define CONFIG_SYS_NUM_FMAN 1 +#define CONFIG_SYS_NUM_FM1_DTSEC 5 +#define CONFIG_SYS_NUM_FM1_10GEC 1 +#define CONFIG_NUM_DDR_CONTROLLERS 2 #else #error Processor type not defined for this platform |