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| author | Marek Vasut <marek.vasut@gmail.com> | 2012-03-06 11:57:43 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-03-26 23:09:26 +0200 |
| commit | cd207cde948ecf9ff50a0fa1ae2650f65579c9c9 (patch) | |
| tree | 66940be97693f63bbe3a0bf130b534b4728f6b33 | |
| parent | 44e63c228ea8730af5782d1c29c5bef2e57c9b0e (diff) | |
| download | olio-uboot-2014.01-cd207cde948ecf9ff50a0fa1ae2650f65579c9c9.tar.xz olio-uboot-2014.01-cd207cde948ecf9ff50a0fa1ae2650f65579c9c9.zip | |
IXP: Fix GPIO_INT_ACT_LOW_SET()
The GPIO_INT_ACT_LOW_SET was incorrectly handling interrupt lines higher than 7.
This is due to the fact that there are two registers for total of 16 lines.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Bryan Hundven <bryanhundven@gmail.com>
Cc: Michael Schwingen <rincewind@discworld.dascon.de>
| -rw-r--r-- | arch/arm/include/asm/arch-ixp/ixp425.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-ixp/ixp425.h b/arch/arm/include/asm/arch-ixp/ixp425.h index 5132607c6..c2e9c8204 100644 --- a/arch/arm/include/asm/arch-ixp/ixp425.h +++ b/arch/arm/include/asm/arch-ixp/ixp425.h @@ -358,6 +358,9 @@ #define IXP425_GPIO_GPCLKR IXP425_GPIO_REG(IXP425_GPIO_GPCLKR_OFFSET) #define IXP425_GPIO_GPDBSELR IXP425_GPIO_REG(IXP425_GPIO_GPDBSELR_OFFSET) +#define IXP425_GPIO_GPITR(line) (((line) >= 8) ? \ + IXP425_GPIO_GPIT2R : IXP425_GPIO_GPIT1R) + /* * Macros to make it easy to access the GPIO registers */ @@ -365,8 +368,11 @@ #define GPIO_OUTPUT_DISABLE(line) *IXP425_GPIO_GPOER |= (1 << (line)) #define GPIO_OUTPUT_SET(line) *IXP425_GPIO_GPOUTR |= (1 << (line)) #define GPIO_OUTPUT_CLEAR(line) *IXP425_GPIO_GPOUTR &= ~(1 << (line)) -#define GPIO_INT_ACT_LOW_SET(line) *IXP425_GPIO_GPIT1R = \ - (*IXP425_GPIO_GPIT1R & ~(0x7 << (line * 3))) | (0x1 << (line * 3)) +#define GPIO_INT_ACT_LOW_SET(line) \ + *IXP425_GPIO_GPITR(line) = \ + (*IXP425_GPIO_GPITR(line) & \ + ~(0x7 << (((line) & 0x7) * 3))) | \ + (0x1 << (((line) & 0x7) * 3)) \ /* * Constants to make it easy to access Timer Control/Status registers |