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| author | Linus Walleij <linus.walleij@linaro.org> | 2011-07-25 01:49:36 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-03 22:40:45 +0200 |
| commit | a46877cc472230fddfe56f2dfd26017b28f4bba9 (patch) | |
| tree | 9e428359d3d1ecaa16d4f06f353458212f2cbd92 | |
| parent | 34fe8281d7323784544e94d2f7218f52b8a2899d (diff) | |
| download | olio-uboot-2014.01-a46877cc472230fddfe56f2dfd26017b28f4bba9.tar.xz olio-uboot-2014.01-a46877cc472230fddfe56f2dfd26017b28f4bba9.zip | |
integratorap: make the compile work again
The integratorap/cp config for u-boot was outdated and would not
even compile, so fix the obvious missing bits for it to start
building. After this "make ap920t_config/make all" starts working
again.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | board/armltd/integrator/lowlevel_init.S | 2 | ||||
| -rw-r--r-- | include/configs/integratorap.h | 6 |
2 files changed, 7 insertions, 1 deletions
diff --git a/board/armltd/integrator/lowlevel_init.S b/board/armltd/integrator/lowlevel_init.S index ab9589c95..6f55bb548 100644 --- a/board/armltd/integrator/lowlevel_init.S +++ b/board/armltd/integrator/lowlevel_init.S @@ -199,7 +199,7 @@ cm_remap: /* Now 0x00000000 is writeable, replace the vectors */ ldr r0, =_start /* r0 <- start of vectors */ - ldr r2, =_armboot_start /* r2 <- past vectors */ + ldr r2, =_TEXT_BASE /* r2 <- past vectors */ sub r1,r1,r1 /* destination 0x00000000 */ copy_vec: diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 32ff1932c..8b41885fe 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -120,6 +120,12 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_FLASH_BASE 0x24000000 |