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| author | Haiying Wang <haiying.wang@freescale.com> | 2006-12-07 10:35:55 -0600 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-03-22 11:02:35 -0500 |
| commit | 9964a4dd0d4ef5a037febaebf1aa494b1a72991c (patch) | |
| tree | 6e6a747a08077fec337d977ce0f9b65fd1af89f8 | |
| parent | 5a58a73ceb0a4059c42ef64cedbc1a45e0aaa00e (diff) | |
| download | olio-uboot-2014.01-9964a4dd0d4ef5a037febaebf1aa494b1a72991c.tar.xz olio-uboot-2014.01-9964a4dd0d4ef5a037febaebf1aa494b1a72991c.zip | |
Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
| -rw-r--r-- | cpu/mpc86xx/interrupts.c | 20 | ||||
| -rw-r--r-- | include/asm-ppc/immap_86xx.h | 2 |
2 files changed, 22 insertions, 0 deletions
diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c index 1df6cdc5b..49820bbd8 100644 --- a/cpu/mpc86xx/interrupts.c +++ b/cpu/mpc86xx/interrupts.c @@ -80,6 +80,26 @@ int interrupt_init(void) { int ret; + /* + * The IRQ0 on Rev 2 is pulled high (low in Rev 1.x) to + * implement PEX10 errata. As INT is active high, it + * will cause core to take 0x500 interrupt. + * + * Due to the PIC's default pass through mode, as soon + * as interrupts are enabled (MSR[EE] = 1), an interrupt + * will be taken and u-boot will hang. This is due to a + * hardware change (per an errata fix) on new revisions + * of the board with Rev 2.x parts. + * + * Setting the PIC to mixed mode prevents the hang. + */ + if ((get_svr() & 0xf0) == 0x20) { + volatile immap_t *immr = (immap_t *)CFG_IMMR; + immr->im_pic.gcr = MPC86xx_PICGCR_RST; + while (immr->im_pic.gcr & MPC86xx_PICGCR_RST); + immr->im_pic.gcr = MPC86xx_PICGCR_MODE; + } + /* call cpu specific function from $(CPU)/interrupts.c */ ret = interrupt_init_cpu(&decrementer_count); diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index a5552c48e..0e3fc3403 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -721,6 +721,8 @@ typedef struct ccsr_pic { uint frr; /* 0x41000 - Feature Reporting Register */ char res10[28]; uint gcr; /* 0x41020 - Global Configuration Register */ +#define MPC86xx_PICGCR_RST 0x80000000 +#define MPC86xx_PICGCR_MODE 0x20000000 char res11[92]; uint vir; /* 0x41080 - Vendor Identification Register */ char res12[12]; |