diff options
| author | Timur Tabi <timur@freescale.com> | 2012-03-15 11:42:27 +0000 | 
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-04-24 23:58:34 -0500 | 
| commit | 5d065c3e103133f811fdf77f6b793950fc3d3424 (patch) | |
| tree | 4e4b7bbff4e0af5165c2d0b8ab9ad1dd3695acb4 | |
| parent | 34e210f5bd9c000cec39b45483be6df52e2b6e07 (diff) | |
| download | olio-uboot-2014.01-5d065c3e103133f811fdf77f6b793950fc3d3424.tar.xz olio-uboot-2014.01-5d065c3e103133f811fdf77f6b793950fc3d3424.zip | |
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
Most 85xx boards can be built as a 32-bit or a 36-bit.  Current code sometimes
displays which of these is actually built, but it's inconsistent.  This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used.  Not only that, but each board includes code that displays
the message, so there is duplication.
The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time.  The board-specific code is
deleted.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
| -rw-r--r-- | board/freescale/corenet_ds/corenet_ds.c | 4 | ||||
| -rw-r--r-- | board/freescale/mpc8536ds/mpc8536ds.c | 7 | ||||
| -rw-r--r-- | board/freescale/mpc8572ds/mpc8572ds.c | 6 | ||||
| -rw-r--r-- | board/freescale/mpc8641hpcn/mpc8641hpcn.c | 3 | ||||
| -rw-r--r-- | board/freescale/p1010rdb/p1010rdb.c | 6 | ||||
| -rw-r--r-- | board/freescale/p1022ds/p1022ds.c | 8 | ||||
| -rw-r--r-- | board/freescale/p1_p2_rdb/p1_p2_rdb.c | 4 | ||||
| -rw-r--r-- | board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 8 | ||||
| -rw-r--r-- | board/freescale/p2020ds/p2020ds.c | 8 | ||||
| -rw-r--r-- | board/freescale/p2041rdb/p2041rdb.c | 4 | ||||
| -rw-r--r-- | board/freescale/p3060qds/p3060qds.c | 3 | 
11 files changed, 9 insertions, 52 deletions
| diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index b1eecc495..a33c936fa 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -62,10 +62,6 @@ int checkboard (void)  	else  		printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH); -#ifdef CONFIG_PHYS_64BIT -	puts("36-bit Addressing\n"); -#endif -  	/* Display the RCW, so that no one gets confused as to what RCW  	 * we're actually using for this boot.  	 */ diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index c9f85c857..6d0bfde23 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -68,12 +68,7 @@ int checkboard (void)  	u8 vboot;  	u8 *pixis_base = (u8 *)PIXIS_BASE; -	puts("Board: MPC8536DS "); -#ifdef CONFIG_PHYS_64BIT -	puts("(36-bit addrmap) "); -#endif - -	printf ("Sys ID: 0x%02x, " +	printf("Board: MPC8536DS Sys ID: 0x%02x, "  		"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",  		in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),  		in_8(pixis_base + PIXIS_PVER)); diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index b20299e36..33a02ba8d 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -45,11 +45,7 @@ int checkboard (void)  	u8 vboot;  	u8 *pixis_base = (u8 *)PIXIS_BASE; -	puts ("Board: MPC8572DS "); -#ifdef CONFIG_PHYS_64BIT -	puts ("(36-bit addrmap) "); -#endif -	printf ("Sys ID: 0x%02x, " +	printf("Board: MPC8572DS Sys ID: 0x%02x, "  		"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",  		in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),  		in_8(pixis_base + PIXIS_PVER)); diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 455569e42..6a0a3a2b3 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -50,9 +50,6 @@ int checkboard(void)  	else  		puts ("Promjet\n"); -#ifdef CONFIG_PHYS_64BIT -	printf ("       36-bit physical address map\n"); -#endif  	return 0;  } diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index b9e66f7fa..79a6ead7d 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -165,11 +165,7 @@ int checkboard(void)  	struct cpu_type *cpu;  	cpu = gd->cpu; -	printf("Board: %sRDB ", cpu->name); -#ifdef CONFIG_PHYS_64BIT -	puts("(36-bit addrmap)"); -#endif -	puts("\n"); +	printf("Board: %sRDB\n", cpu->name);  	return 0;  } diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index 456d9b0e3..aca30f368 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -56,12 +56,8 @@ int checkboard(void)  {  	u8 sw; -	puts("Board: P1022DS "); -#ifdef CONFIG_PHYS_64BIT -	puts("(36-bit addrmap) "); -#endif - -	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", +	printf("Board: P1022DS Sys ID: 0x%02x, " +	       "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",  		in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));  	sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index cfbae6911..437eaf0fd 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -110,9 +110,7 @@ int checkboard (void)  	cpu = gd->cpu;  	printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev); -#ifdef CONFIG_PHYS_64BIT -	puts ("(36-bit addrmap) \n"); -#endif +  	setbits_be32(&pgpio->gpdir, GPIO_DIR);  /* diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index a60c5a20a..aa39260ca 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -225,13 +225,7 @@ int checkboard(void)  	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);  	u8 in, out, io_config, val; -	printf("Board: %s ", CONFIG_BOARDNAME); - -#ifdef CONFIG_PHYS_64BIT -	puts("(36-bit addrmap) "); -#endif - -	printf("CPLD: V%d.%d PCBA: V%d.0\n", +	printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,  		in_8(&cpld_data->cpld_rev_major) & 0x0F,  		in_8(&cpld_data->cpld_rev_minor) & 0x0F,  		in_8(&cpld_data->pcba_rev) & 0x0F); diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index d3af6cf18..e8d31a4ac 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -61,12 +61,8 @@ int checkboard(void)  {  	u8 sw; -	puts("Board: P2020DS "); -#ifdef CONFIG_PHYS_64BIT -	puts("(36-bit addrmap) "); -#endif - -	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", +	printf("Board: P2020DS Sys ID: 0x%02x, " +	       "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",  		in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));  	sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH)); diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index 1f6a34b3d..976c8d290 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -54,10 +54,6 @@ int checkboard(void)  	sw = CPLD_READ(fbank_sel);  	printf("vBank: %d\n", sw & 0x1); -#ifdef CONFIG_PHYS_64BIT -	puts("36-bit Addressing\n"); -#endif -  	/*  	 * Display the RCW, so that no one gets confused as to what RCW  	 * we're actually using for this boot. diff --git a/board/freescale/p3060qds/p3060qds.c b/board/freescale/p3060qds/p3060qds.c index c6c74f200..c7cca2a0c 100644 --- a/board/freescale/p3060qds/p3060qds.c +++ b/board/freescale/p3060qds/p3060qds.c @@ -68,9 +68,6 @@ int checkboard(void)  	else  		printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH); -#ifdef CONFIG_PHYS_64BIT -	puts("36-bit Addressing\n"); -#endif  	puts("Reset Configuration Word (RCW):");  	for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {  		u32 rcw = in_be32(&gur->rcwsr[i]); |