diff options
| author | Ruchika Gupta <ruchika.gupta@freescale.com> | 2011-06-08 22:52:48 -0500 | 
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-10-03 08:52:14 -0500 | 
| commit | 2f439e805e945b410b0043db82f9666eb03914ba (patch) | |
| tree | 61162cdbb7769fd94f64561bfd8e5b73add14cf8 | |
| parent | 550a24921112370cb6b236fa5ff95b38919c2a96 (diff) | |
| download | olio-uboot-2014.01-2f439e805e945b410b0043db82f9666eb03914ba.tar.xz olio-uboot-2014.01-2f439e805e945b410b0043db82f9666eb03914ba.zip | |
powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
| -rw-r--r-- | boards.cfg | 6 | ||||
| -rw-r--r-- | include/configs/P1010RDB.h | 15 | 
2 files changed, 19 insertions, 2 deletions
| diff --git a/boards.cfg b/boards.cfg index ae8d1957f..acbf664a4 100644 --- a/boards.cfg +++ b/boards.cfg @@ -568,13 +568,19 @@ MPC8572DS                    powerpc     mpc85xx     mpc8572ds           freesca  MPC8572DS_36BIT              powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:36BIT  MPC8572DS_NAND               powerpc     mpc85xx     mpc8572ds           freescale      -           MPC8572DS:NAND  P1010RDB_NOR                 powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB +P1010RDB_NOR_SECBOOT         powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,SECURE_BOOT  P1010RDB_36BIT_NOR           powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT +P1010RDB_36BIT_NOR_SECBOOT   powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,SECURE_BOOT  P1010RDB_NAND                powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,NAND +P1010RDB_NAND_SECBOOT        powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,NAND_SECBOOT,SECURE_BOOT  P1010RDB_36BIT_NAND          powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND +P1010RDB_36BIT_NAND_SECBOOT  powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT  P1010RDB_SDCARD              powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,SDCARD  P1010RDB_SPIFLASH            powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,SPIFLASH +P1010RDB_SPIFLASH_SECBOOT    powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,SPIFLASH,SECURE_BOOT  P1010RDB_36BIT_SDCARD        powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,SDCARD  P1010RDB_36BIT_SPIFLASH      powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,SPIFLASH +P1010RDB_36BIT_SPIFLASH_SECBOOT      powerpc     mpc85xx     p1010rdb            freescale      -           P1010RDB:P1010RDB,36BIT,SPIFLASH,SECURE_BOOT  P1011RDB                     powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P1011RDB  P1011RDB_36BIT               powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P1011RDB,36BIT  P1011RDB_36BIT_SDCARD        powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P1011RDB,36BIT,SDCARD diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ff35fb178..ca6178a13 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -59,6 +59,13 @@  #endif /* CONFIG_NAND_SPL */  #endif + +#ifdef CONFIG_NAND_SECBOOT	/* NAND Boot */ +#define CONFIG_RAMBOOT_NAND +#define CONFIG_SYS_TEXT_BASE		0x11000000 +#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc +#endif +  #ifndef CONFIG_SYS_TEXT_BASE  #define CONFIG_SYS_TEXT_BASE		0xeff80000  #endif @@ -345,7 +352,7 @@ extern unsigned long get_sdram_size(void);  #define CONFIG_SYS_NAND_DDR_LAW		11  /* Set up IFC registers for boot location NOR/NAND */ -#ifdef CONFIG_NAND_U_BOOT +#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SECBOOT)  #define CONFIG_SYS_CSPR0		CONFIG_SYS_NAND_CSPR  #define CONFIG_SYS_AMASK0		CONFIG_SYS_NAND_AMASK  #define CONFIG_SYS_CSOR0		CONFIG_SYS_NAND_CSOR @@ -501,7 +508,7 @@ extern unsigned long get_sdram_size(void);   * SPI interface will not be available in case of NAND boot SPI CS0 will be   * used for SLIC   */ -#ifndef CONFIG_NAND_U_BOOT +#if !defined(CONFIG_NAND_U_BOOT) || !defined(CONFIG_NAND_SECBOOT)  /* eSPI - Enhanced SPI */  #define CONFIG_FSL_ESPI  #define CONFIG_SPI_FLASH @@ -762,4 +769,8 @@ extern unsigned long get_sdram_size(void);  #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND +#ifdef CONFIG_SECURE_BOOT +#include <asm/fsl_secure_boot.h> +#endif +  #endif	/* __CONFIG_H */ |