PXA: Toradex Colibri PXA270 support

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

7 files changed, 480 insertions, 0 deletions

diff --git a/MAKEALL b/MAKEALL
index e52712a33..86f593081 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -704,6 +704,7 @@ LIST_at91="			\
 
 LIST_pxa="		\
 	cerf250		\
+	colibri_pxa270	\
 	cradle		\
 	csb226		\
 	delta		\
diff --git a/board/colibri_pxa270/Makefile b/board/colibri_pxa270/Makefile
new file mode 100644
index 000000000..44d73ccf5
--- /dev/null
+++ b/board/colibri_pxa270/Makefile
@@ -0,0 +1,45 @@
+#
+# Toradex Colibri PXA270 Support
+#
+# Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= colibri_pxa270.o
+SOBJS	:= lowlevel_init.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/colibri_pxa270/colibri_pxa270.c b/board/colibri_pxa270/colibri_pxa270.c
new file mode 100644
index 000000000..d3822f03b
--- /dev/null
+++ b/board/colibri_pxa270/colibri_pxa270.c
@@ -0,0 +1,118 @@
+/*
+ * Toradex Colibri PXA270 Support
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+extern struct serial_device serial_ffuart_device;
+extern struct serial_device serial_btuart_device;
+extern struct serial_device serial_stuart_device;
+
+struct serial_device *default_serial_console (void)
+{
+	return &serial_ffuart_device;
+}
+
+int board_init (void)
+{
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
+
+	/* arch number of vpac270 */
+	gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+	return 0;
+}
+
+int dram_init (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return 0;
+}
+
+#ifdef	CONFIG_CMD_USB
+int usb_board_init(void)
+{
+	UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
+		~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
+
+	UHCHR |= UHCHR_FSBIR;
+
+	while (UHCHR & UHCHR_FSBIR);
+
+	UHCHR &= ~UHCHR_SSE;
+	UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
+
+	/* Clear any OTG Pin Hold */
+	if (PSSR & PSSR_OTGPH)
+		PSSR |= PSSR_OTGPH;
+
+	UHCRHDA &= ~(0x200);
+	UHCRHDA |= 0x100;
+
+	/* Set port power control mask bits, only 3 ports. */
+	UHCRHDB |= (0x7<<17);
+
+	/* enable port 2 */
+	UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
+
+	return 0;
+}
+
+void usb_board_init_fail(void)
+{
+	return;
+}
+
+void usb_board_stop(void)
+{
+	UHCHR |= UHCHR_FHR;
+	udelay(11);
+	UHCHR &= ~UHCHR_FHR;
+
+	UHCCOMS |= 1;
+	udelay(10);
+
+	CKEN &= ~CKEN10_USBHOST;
+
+	return;
+}
+#endif
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+	return dm9000_initialize(bis);
+}
+#endif
diff --git a/board/colibri_pxa270/config.mk b/board/colibri_pxa270/config.mk
new file mode 100644
index 000000000..1d650acd9
--- /dev/null
+++ b/board/colibri_pxa270/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0xa1000000
diff --git a/board/colibri_pxa270/lowlevel_init.S b/board/colibri_pxa270/lowlevel_init.S
new file mode 100644
index 000000000..a43dac2ba
--- /dev/null
+++ b/board/colibri_pxa270/lowlevel_init.S
@@ -0,0 +1,36 @@
+/*
+ * Toradex Colibri PXA270 Lowlevel Hardware Initialization
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/macro.h>
+
+.globl lowlevel_init
+lowlevel_init:
+	pxa_gpio_setup
+	pxa_wait_ticks	0x8000
+	pxa_mem_setup
+	pxa_wakeup
+	pxa_intr_setup
+	pxa_clock_setup
+
+	mov	pc, lr
diff --git a/boards.cfg b/boards.cfg
index 17a6f9314..f26445e76 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -52,6 +52,7 @@ actux3		arm	ixp
 actux4		arm	ixp
 ixdp425		arm	ixp
 cerf250		arm	pxa
+colibri_pxa270	arm	pxa
 cradle		arm	pxa
 csb226		arm	pxa
 delta		arm	pxa
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
new file mode 100644
index 000000000..277ff67bf
--- /dev/null
+++ b/include/configs/colibri_pxa270.h
@@ -0,0 +1,278 @@
+/*
+ * Toradex Colibri PXA270 configuration file
+ *
+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Board Configuration Options
+ */
+#define	CONFIG_PXA27X		1	/* Marvell PXA270 CPU */
+#define	CONFIG_VPAC270		1	/* Toradex Colibri PXA270 board */
+
+#undef	BOARD_LATE_INIT
+#undef	CONFIG_SKIP_RELOCATE_UBOOT
+#undef	CONFIG_USE_IRQ
+#undef	CONFIG_SKIP_LOWLEVEL_INIT
+
+/*
+ * Environment settings
+ */
+#define	CONFIG_ENV_SIZE			0x4000
+#define	CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
+#define	CONFIG_SYS_GBL_DATA_SIZE	128
+
+#define	CONFIG_ENV_OVERWRITE		/* override default environment */
+
+#define	CONFIG_BOOTCOMMAND						\
+	"if mmc init && fatload mmc 0 0xa0000000 uImage; then "		\
+		"bootm 0xa0000000; "					\
+	"fi; "								\
+	"if usb reset && fatload usb 0 0xa0000000 uImage; then "	\
+		"bootm 0xa0000000; "					\
+	"fi; "								\
+	"bootm 0x80000;"
+#define	CONFIG_BOOTARGS			"console=tty0 console=ttyS0,115200"
+#define	CONFIG_TIMESTAMP
+#define	CONFIG_BOOTDELAY		2	/* Autoboot delay */
+#define	CONFIG_CMDLINE_TAG
+#define	CONFIG_SETUP_MEMORY_TAGS
+
+#define	CONFIG_LZMA			/* LZMA compression support */
+
+/*
+ * Serial Console Configuration
+ */
+#define	CONFIG_PXA_SERIAL
+#define	CONFIG_FFUART			1
+#define	CONFIG_BAUDRATE			115200
+#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Bootloader Components Configuration
+ */
+#include <config_cmd_default.h>
+
+#define	CONFIG_CMD_NET
+#define	CONFIG_CMD_ENV
+#undef	CONFIG_CMD_IMLS
+#define	CONFIG_CMD_MMC
+#define	CONFIG_CMD_USB
+#define	CONFIG_CMD_FLASH
+
+/*
+ * Networking Configuration
+ *  chip on the Voipac PXA270 board
+ */
+#ifdef	CONFIG_CMD_NET
+#define	CONFIG_CMD_PING
+#define	CONFIG_CMD_DHCP
+
+#define	CONFIG_NET_MULTI		1
+#define	CONFIG_DRIVER_DM9000		1
+#define CONFIG_DM9000_BASE		0x08000000
+#define DM9000_IO			(CONFIG_DM9000_BASE)
+#define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
+#define	CONFIG_NET_RETRY_COUNT		10
+
+#define	CONFIG_BOOTP_BOOTFILESIZE
+#define	CONFIG_BOOTP_BOOTPATH
+#define	CONFIG_BOOTP_GATEWAY
+#define	CONFIG_BOOTP_HOSTNAME
+#endif
+
+/*
+ * MMC Card Configuration
+ */
+#ifdef	CONFIG_CMD_MMC
+#define	CONFIG_MMC
+#define	CONFIG_PXA_MMC
+#define	CONFIG_SYS_MMC_BASE		0xF0000000
+#define	CONFIG_CMD_FAT
+#define	CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * KGDB
+ */
+#ifdef	CONFIG_CMD_KGDB
+#define	CONFIG_KGDB_BAUDRATE		230400		/* speed to run kgdb serial port */
+#define	CONFIG_KGDB_SER_INDEX		2		/* which serial port to use */
+#endif
+
+/*
+ * HUSH Shell Configuration
+ */
+#define	CONFIG_SYS_HUSH_PARSER		1
+#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+#define	CONFIG_SYS_LONGHELP				/* undef to save memory	*/
+#ifdef	CONFIG_SYS_HUSH_PARSER
+#define	CONFIG_SYS_PROMPT		"$ "		/* Monitor Command Prompt */
+#else
+#define	CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt */
+#endif
+#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
+#define	CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
+#define	CONFIG_SYS_MAXARGS		16		/* max number of command args */
+#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
+#define	CONFIG_SYS_DEVICE_NULLDEV	1
+
+/*
+ * Clock Configuration
+ */
+#undef	CONFIG_SYS_CLKS_IN_HZ
+#define	CONFIG_SYS_HZ			3250000		/* Timer @ 3250000 Hz */
+#define CONFIG_SYS_CPUSPEED		0x290		/* 520 MHz */
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define	CONFIG_STACKSIZE		(128*1024)	/* regular stack */
+#ifdef	CONFIG_USE_IRQ
+#define	CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
+#define	CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * DRAM Map
+ */
+#define	CONFIG_NR_DRAM_BANKS		1		/* We have 1 bank of DRAM */
+#define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
+#define	PHYS_SDRAM_1_SIZE		0x04000000	/* 64 MB */
+
+#define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
+#define	CONFIG_SYS_DRAM_SIZE		0x04000000	/* 64 MB DRAM */
+
+#define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
+#define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */
+
+#define	CONFIG_SYS_LOAD_ADDR		(0xa1000000)
+
+/*
+ * NOR FLASH
+ */
+#ifdef	CONFIG_CMD_FLASH
+#define	PHYS_FLASH_1			0x00000000	/* Flash Bank #1 */
+#define	CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+
+#define	CONFIG_SYS_FLASH_CFI
+#define	CONFIG_FLASH_CFI_DRIVER		1
+
+#define	CONFIG_SYS_MAX_FLASH_SECT	(4 + 255)
+#define	CONFIG_SYS_MAX_FLASH_BANKS	1
+
+#define	CONFIG_SYS_FLASH_ERASE_TOUT	(25*CONFIG_SYS_HZ)
+#define	CONFIG_SYS_FLASH_WRITE_TOUT	(25*CONFIG_SYS_HZ)
+
+#define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
+#define	CONFIG_SYS_FLASH_PROTECTION		1
+
+#define CONFIG_ENV_IS_IN_FLASH		1
+
+#else	/* No flash */
+#define	CONFIG_SYS_NO_FLASH
+#define	CONFIG_SYS_ENV_IS_NOWHERE
+#endif
+
+#define	CONFIG_SYS_MONITOR_BASE		0x000000
+#define	CONFIG_SYS_MONITOR_LEN		0x40000
+
+#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SECT_SIZE	0x40000
+#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
+
+
+/*
+ * GPIO settings
+ */
+#define	CONFIG_SYS_GPSR0_VAL	0x00000000
+#define	CONFIG_SYS_GPSR1_VAL	0x00020000
+#define	CONFIG_SYS_GPSR2_VAL	0x0002C000
+#define	CONFIG_SYS_GPSR3_VAL	0x00000000
+
+#define	CONFIG_SYS_GPCR0_VAL	0x00000000
+#define	CONFIG_SYS_GPCR1_VAL	0x00000000
+#define	CONFIG_SYS_GPCR2_VAL	0x00000000
+#define	CONFIG_SYS_GPCR3_VAL	0x00000000
+
+#define	CONFIG_SYS_GPDR0_VAL	0x08000000
+#define	CONFIG_SYS_GPDR1_VAL	0x0002A981
+#define	CONFIG_SYS_GPDR2_VAL	0x0202FC00
+#define	CONFIG_SYS_GPDR3_VAL	0x00000000
+
+#define	CONFIG_SYS_GAFR0_L_VAL	0x00100000
+#define	CONFIG_SYS_GAFR0_U_VAL	0x00C00010
+#define	CONFIG_SYS_GAFR1_L_VAL	0x999A901A
+#define	CONFIG_SYS_GAFR1_U_VAL	0xAAA00008
+#define	CONFIG_SYS_GAFR2_L_VAL	0xAAAAAAAA
+#define	CONFIG_SYS_GAFR2_U_VAL	0x0109A000
+#define	CONFIG_SYS_GAFR3_L_VAL	0x54000300
+#define	CONFIG_SYS_GAFR3_U_VAL	0x00024001
+
+#define	CONFIG_SYS_PSSR_VAL	0x30
+
+/*
+ * Clock settings
+ */
+#define	CONFIG_SYS_CKEN		0x00500240
+#define	CONFIG_SYS_CCCR		0x02000290
+
+/*
+ * Memory settings
+ */
+#define	CONFIG_SYS_MSC0_VAL	0x000095f2
+#define	CONFIG_SYS_MSC1_VAL	0x00007ff4
+#define	CONFIG_SYS_MSC2_VAL	0x00000000
+#define	CONFIG_SYS_MDCNFG_VAL	0x08000ac9
+#define	CONFIG_SYS_MDREFR_VAL	0x2013e01e
+#define	CONFIG_SYS_MDMRS_VAL	0x00320032
+#define	CONFIG_SYS_FLYCNFG_VAL	0x00000000
+#define	CONFIG_SYS_SXCNFG_VAL	0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define	CONFIG_SYS_MECR_VAL	0x00000001
+#define	CONFIG_SYS_MCMEM0_VAL	0x00014307
+#define	CONFIG_SYS_MCMEM1_VAL	0x00014307
+#define	CONFIG_SYS_MCATT0_VAL	0x0001c787
+#define	CONFIG_SYS_MCATT1_VAL	0x0001c787
+#define	CONFIG_SYS_MCIO0_VAL	0x0001430f
+#define	CONFIG_SYS_MCIO1_VAL	0x0001430f
+
+/*
+ * USB
+ */
+#ifdef CONFIG_CMD_USB
+#define	CONFIG_USB_OHCI_NEW
+#define	CONFIG_SYS_USB_OHCI_CPU_INIT
+#define	CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define	CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#define	CONFIG_SYS_USB_OHCI_REGS_BASE	0x4C000000
+#define	CONFIG_SYS_USB_OHCI_SLOT_NAME	"tdex270"
+#define	CONFIG_USB_STORAGE
+#endif
+
+#endif	/* __CONFIG_H */