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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 13:39:59 +0200 | 
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-08 13:39:59 +0200 | 
| commit | 5e13a0c5ec05d382b488a691dfb8af015b1dea1e (patch) | |
| tree | 7a06dfa1f7661f8908193f2437b32452520221d3 /drivers/spi/spi-bfin5xx.c | |
| parent | b615b57a124a4af7b68196bc2fb8acc236041fa2 (diff) | |
| parent | 4f256e8aa3eda15c11c3cec3ec5336e1fc579cbd (diff) | |
| download | olio-linux-3.10-5e13a0c5ec05d382b488a691dfb8af015b1dea1e.tar.xz olio-linux-3.10-5e13a0c5ec05d382b488a691dfb8af015b1dea1e.zip  | |
Merge remote-tracking branch 'airlied/drm-core-next' into drm-intel-next-queued
Backmerge of drm-next to resolve a few ugly conflicts and to get a few
fixes from 3.4-rc6 (which drm-next has already merged). Note that this
merge also restricts the stencil cache lra evict policy workaround to
snb (as it should) - I had to frob the code anyway because the
CM0_MASK_SHIFT define died in the masked bit cleanups.
We need the backmerge to get Paulo Zanoni's infoframe regression fix
for gm45 - further bugfixes from him touch the same area and would
needlessly conflict.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/spi/spi-bfin5xx.c')
| -rw-r--r-- | drivers/spi/spi-bfin5xx.c | 14 | 
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c index 3b83ff8b1e2..9bb4d4af854 100644 --- a/drivers/spi/spi-bfin5xx.c +++ b/drivers/spi/spi-bfin5xx.c @@ -396,7 +396,7 @@ static irqreturn_t bfin_spi_pio_irq_handler(int irq, void *dev_id)  		/* last read */  		if (drv_data->rx) {  			dev_dbg(&drv_data->pdev->dev, "last read\n"); -			if (n_bytes % 2) { +			if (!(n_bytes % 2)) {  				u16 *buf = (u16 *)drv_data->rx;  				for (loop = 0; loop < n_bytes / 2; loop++)  					*buf++ = bfin_read(&drv_data->regs->rdbr); @@ -424,7 +424,7 @@ static irqreturn_t bfin_spi_pio_irq_handler(int irq, void *dev_id)  	if (drv_data->rx && drv_data->tx) {  		/* duplex */  		dev_dbg(&drv_data->pdev->dev, "duplex: write_TDBR\n"); -		if (n_bytes % 2) { +		if (!(n_bytes % 2)) {  			u16 *buf = (u16 *)drv_data->rx;  			u16 *buf2 = (u16 *)drv_data->tx;  			for (loop = 0; loop < n_bytes / 2; loop++) { @@ -442,7 +442,7 @@ static irqreturn_t bfin_spi_pio_irq_handler(int irq, void *dev_id)  	} else if (drv_data->rx) {  		/* read */  		dev_dbg(&drv_data->pdev->dev, "read: write_TDBR\n"); -		if (n_bytes % 2) { +		if (!(n_bytes % 2)) {  			u16 *buf = (u16 *)drv_data->rx;  			for (loop = 0; loop < n_bytes / 2; loop++) {  				*buf++ = bfin_read(&drv_data->regs->rdbr); @@ -458,7 +458,7 @@ static irqreturn_t bfin_spi_pio_irq_handler(int irq, void *dev_id)  	} else if (drv_data->tx) {  		/* write */  		dev_dbg(&drv_data->pdev->dev, "write: write_TDBR\n"); -		if (n_bytes % 2) { +		if (!(n_bytes % 2)) {  			u16 *buf = (u16 *)drv_data->tx;  			for (loop = 0; loop < n_bytes / 2; loop++) {  				bfin_read(&drv_data->regs->rdbr); @@ -587,6 +587,7 @@ static void bfin_spi_pump_transfers(unsigned long data)  	if (message->state == DONE_STATE) {  		dev_dbg(&drv_data->pdev->dev, "transfer: all done!\n");  		message->status = 0; +		bfin_spi_flush(drv_data);  		bfin_spi_giveback(drv_data);  		return;  	} @@ -870,8 +871,10 @@ static void bfin_spi_pump_transfers(unsigned long data)  		message->actual_length += drv_data->len_in_bytes;  		/* Move to next transfer of this msg */  		message->state = bfin_spi_next_transfer(drv_data); -		if (drv_data->cs_change) +		if (drv_data->cs_change && message->state != DONE_STATE) { +			bfin_spi_flush(drv_data);  			bfin_spi_cs_deactive(drv_data, chip); +		}  	}  	/* Schedule next transfer tasklet */ @@ -1026,7 +1029,6 @@ static int bfin_spi_setup(struct spi_device *spi)  		chip->cs_chg_udelay = chip_info->cs_chg_udelay;  		chip->idle_tx_val = chip_info->idle_tx_val;  		chip->pio_interrupt = chip_info->pio_interrupt; -		spi->bits_per_word = chip_info->bits_per_word;  	} else {  		/* force a default base state */  		chip->ctl_reg &= bfin_ctl_reg;  |