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| author | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 11:16:34 +0200 | 
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-11 11:16:34 +0200 | 
| commit | 4b60eb8380a0b588a03b6052d7ac93e1964c75b8 (patch) | |
| tree | 0b66caf260001230144ba3d09bde84d3bd58dc81 /arch/x86/power/cpu.c | |
| parent | 44f0257fc316ff4b33aa3438dd8d891b7d6d72b9 (diff) | |
| download | olio-linux-3.10-4b60eb8380a0b588a03b6052d7ac93e1964c75b8.tar.xz olio-linux-3.10-4b60eb8380a0b588a03b6052d7ac93e1964c75b8.zip  | |
i386: move power
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/power/cpu.c')
| -rw-r--r-- | arch/x86/power/cpu.c | 133 | 
1 files changed, 133 insertions, 0 deletions
diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c new file mode 100644 index 00000000000..998fd3ec0d6 --- /dev/null +++ b/arch/x86/power/cpu.c @@ -0,0 +1,133 @@ +/* + * Suspend support specific for i386. + * + * Distribute under GPLv2 + * + * Copyright (c) 2002 Pavel Machek <pavel@suse.cz> + * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> + */ + +#include <linux/module.h> +#include <linux/suspend.h> +#include <asm/mtrr.h> +#include <asm/mce.h> + +static struct saved_context saved_context; + +unsigned long saved_context_ebx; +unsigned long saved_context_esp, saved_context_ebp; +unsigned long saved_context_esi, saved_context_edi; +unsigned long saved_context_eflags; + +void __save_processor_state(struct saved_context *ctxt) +{ +	mtrr_save_fixed_ranges(NULL); +	kernel_fpu_begin(); + +	/* +	 * descriptor tables +	 */ + 	store_gdt(&ctxt->gdt); + 	store_idt(&ctxt->idt); + 	store_tr(ctxt->tr); + +	/* +	 * segment registers +	 */ + 	savesegment(es, ctxt->es); + 	savesegment(fs, ctxt->fs); + 	savesegment(gs, ctxt->gs); + 	savesegment(ss, ctxt->ss); + +	/* +	 * control registers  +	 */ +	ctxt->cr0 = read_cr0(); +	ctxt->cr2 = read_cr2(); +	ctxt->cr3 = read_cr3(); +	ctxt->cr4 = read_cr4(); +} + +void save_processor_state(void) +{ +	__save_processor_state(&saved_context); +} + +static void do_fpu_end(void) +{ +	/* +	 * Restore FPU regs if necessary. +	 */ +	kernel_fpu_end(); +} + +static void fix_processor_context(void) +{ +	int cpu = smp_processor_id(); +	struct tss_struct * t = &per_cpu(init_tss, cpu); + +	set_tss_desc(cpu,t);	/* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */ + +	load_TR_desc();				/* This does ltr */ +	load_LDT(¤t->active_mm->context);	/* This does lldt */ + +	/* +	 * Now maybe reload the debug registers +	 */ +	if (current->thread.debugreg[7]){ +		set_debugreg(current->thread.debugreg[0], 0); +		set_debugreg(current->thread.debugreg[1], 1); +		set_debugreg(current->thread.debugreg[2], 2); +		set_debugreg(current->thread.debugreg[3], 3); +		/* no 4 and 5 */ +		set_debugreg(current->thread.debugreg[6], 6); +		set_debugreg(current->thread.debugreg[7], 7); +	} + +} + +void __restore_processor_state(struct saved_context *ctxt) +{ +	/* +	 * control registers +	 */ +	write_cr4(ctxt->cr4); +	write_cr3(ctxt->cr3); +	write_cr2(ctxt->cr2); +	write_cr0(ctxt->cr0); + +	/* +	 * now restore the descriptor tables to their proper values +	 * ltr is done i fix_processor_context(). +	 */ + 	load_gdt(&ctxt->gdt); + 	load_idt(&ctxt->idt); + +	/* +	 * segment registers +	 */ + 	loadsegment(es, ctxt->es); + 	loadsegment(fs, ctxt->fs); + 	loadsegment(gs, ctxt->gs); + 	loadsegment(ss, ctxt->ss); + +	/* +	 * sysenter MSRs +	 */ +	if (boot_cpu_has(X86_FEATURE_SEP)) +		enable_sep_cpu(); + +	fix_processor_context(); +	do_fpu_end(); +	mtrr_ap_init(); +	mcheck_init(&boot_cpu_data); +} + +void restore_processor_state(void) +{ +	__restore_processor_state(&saved_context); +} + +/* Needed by apm.c */ +EXPORT_SYMBOL(save_processor_state); +EXPORT_SYMBOL(restore_processor_state);  |