diff options
| author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 | 
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| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 | 
| commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
| tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ppc/syslib/m8260_pci.h | |
| download | olio-linux-3.10-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.xz olio-linux-3.10-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.zip  | |
Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/ppc/syslib/m8260_pci.h')
| -rw-r--r-- | arch/ppc/syslib/m8260_pci.h | 76 | 
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/ppc/syslib/m8260_pci.h b/arch/ppc/syslib/m8260_pci.h new file mode 100644 index 00000000000..d1352120acd --- /dev/null +++ b/arch/ppc/syslib/m8260_pci.h @@ -0,0 +1,76 @@ + +#ifndef _PPC_KERNEL_M8260_PCI_H +#define _PPC_KERNEL_M8260_PCI_H + +#include <asm/m8260_pci.h> + +/* + *   Local->PCI map (from CPU)                             controlled by + *   MPC826x master window + * + *   0x80000000 - 0xBFFFFFFF    Total CPU2PCI space        PCIBR0 + *                        + *   0x80000000 - 0x9FFFFFFF    PCI Mem with prefetch      (Outbound ATU #1) + *   0xA0000000 - 0xAFFFFFFF    PCI Mem w/o  prefetch      (Outbound ATU #2) + *   0xB0000000 - 0xB0FFFFFF    32-bit PCI IO              (Outbound ATU #3) + *                       + *   PCI->Local map (from PCI) + *   MPC826x slave window                                  controlled by + * + *   0x00000000 - 0x07FFFFFF    MPC826x local memory       (Inbound ATU #1) + */ + +/*  + * Slave window that allows PCI masters to access MPC826x local memory.  + * This window is set up using the first set of Inbound ATU registers + */ + +#ifndef MPC826x_PCI_SLAVE_MEM_LOCAL +#define MPC826x_PCI_SLAVE_MEM_LOCAL	(((struct bd_info *)__res)->bi_memstart) +#define MPC826x_PCI_SLAVE_MEM_BUS	(((struct bd_info *)__res)->bi_memstart) +#define MPC826x_PCI_SLAVE_MEM_SIZE	(((struct bd_info *)__res)->bi_memsize) +#endif + +/*  + * This is the window that allows the CPU to access PCI address space. + * It will be setup with the SIU PCIBR0 register. All three PCI master + * windows, which allow the CPU to access PCI prefetch, non prefetch, + * and IO space (see below), must all fit within this window.  + */ +#ifndef MPC826x_PCI_BASE +#define MPC826x_PCI_BASE	0x80000000 +#define MPC826x_PCI_MASK	0xc0000000 +#endif + +#ifndef MPC826x_PCI_LOWER_MEM +#define MPC826x_PCI_LOWER_MEM  0x80000000 +#define MPC826x_PCI_UPPER_MEM  0x9fffffff +#define MPC826x_PCI_MEM_OFFSET 0x00000000 +#endif + +#ifndef MPC826x_PCI_LOWER_MMIO +#define MPC826x_PCI_LOWER_MMIO  0xa0000000 +#define MPC826x_PCI_UPPER_MMIO  0xafffffff +#define MPC826x_PCI_MMIO_OFFSET 0x00000000 +#endif + +#ifndef MPC826x_PCI_LOWER_IO +#define MPC826x_PCI_LOWER_IO   0x00000000 +#define MPC826x_PCI_UPPER_IO   0x00ffffff +#define MPC826x_PCI_IO_BASE    0xb0000000 +#define MPC826x_PCI_IO_SIZE    0x01000000 +#endif + +#ifndef _IO_BASE +#define _IO_BASE isa_io_base +#endif + +#ifdef CONFIG_8260_PCI9 +struct pci_controller; +extern void setup_m8260_indirect_pci(struct pci_controller* hose, +				     u32 cfg_addr, u32 cfg_data); +#else +#define setup_m8260_indirect_pci setup_indirect_pci +#endif + +#endif /* _PPC_KERNEL_M8260_PCI_H */  |