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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 07:44:16 -0800 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-03-02 07:44:16 -0800 | 
| commit | aebb2afd5420c860b7fbc3882a323ef1247fbf16 (patch) | |
| tree | 05ee0efcebca5ec421de44de7a6d6271088c64a8 /arch/mips/include/asm/sn/launch.h | |
| parent | 8eae508b7c6ff502a71d0293b69e97c5505d5840 (diff) | |
| parent | edb15d83a875a1f4b1576188844db5c330c3267d (diff) | |
| download | olio-linux-3.10-aebb2afd5420c860b7fbc3882a323ef1247fbf16.tar.xz olio-linux-3.10-aebb2afd5420c860b7fbc3882a323ef1247fbf16.zip  | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 o Add basic support for the Mediatek/Ralink Wireless SoC family.
 o The Qualcomm Atheros platform is extended by support for the new
   QCA955X SoC series as well as a bunch of patches that get the code
   ready for OF support.
 o Lantiq and BCM47XX platform have a few improvements and bug fixes.
 o MIPS has sent a few patches that get the kernel ready for the
   upcoming microMIPS support.
 o The rest of the series is made up of small bug fixes and cleanups
   that relate to various parts of the MIPS code.  The biggy in there is
   a whitespace cleanup.  After I was sent another set of whitespace
   cleanup patches I decided it was the time to clean the whitespace
   "issues" for once and and that touches many files below arch/mips/.
Fix up silly conflicts, mostly due to whitespace cleanups.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits)
  MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
  MIPS: remove broken conditional inside vpe loader code
  MIPS: SMTC: fix implicit declaration of set_vi_handler
  MIPS: early_printk: drop __init annotations
  MIPS: Probe for and report hardware virtualization support.
  MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
  MIPS: ath79: add USB controller registration code for the QCA955X SoCs
  MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
  MIPS: ath79: add WMAC registration code for the QCA955X SoCs
  MIPS: ath79: register UART for the QCA955X SoCs
  MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
  MIPS: ath79: add GPIO setup code for the QCA955X SoCs
  MIPS: ath79: add IRQ handling code for the QCA955X SoCs
  MIPS: ath79: add clock setup code for the QCA955X SoCs
  MIPS: ath79: add SoC detection code for the QCA955X SoCs
  MIPS: ath79: add early printk support for the QCA955X SoCs
  MIPS: ath79: fix WMAC IRQ resource assignment
  mips: reserve elfcorehdr
  mips: Make sure kernel memory is in iomem
  MIPS: ath79: use dynamically allocated USB platform devices
  ...
Diffstat (limited to 'arch/mips/include/asm/sn/launch.h')
| -rw-r--r-- | arch/mips/include/asm/sn/launch.h | 16 | 
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/include/asm/sn/launch.h b/arch/mips/include/asm/sn/launch.h index b7c2226312c..04226d8d30c 100644 --- a/arch/mips/include/asm/sn/launch.h +++ b/arch/mips/include/asm/sn/launch.h @@ -19,7 +19,7 @@   *   * The master stores launch parameters in the launch structure   * corresponding to a target processor that is in a slave loop, then sends - * an interrupt to the slave processor.  The slave calls the desired + * an interrupt to the slave processor.	 The slave calls the desired   * function, then returns to the slave loop.  The master may poll or wait   * for the slaves to finish.   * @@ -33,7 +33,7 @@  #define LAUNCH_PADSZ		0xa0  #endif -#define LAUNCH_OFF_MAGIC	0x00	/* Struct offsets for assembly      */ +#define LAUNCH_OFF_MAGIC	0x00	/* Struct offsets for assembly	    */  #define LAUNCH_OFF_BUSY		0x08  #define LAUNCH_OFF_CALL		0x10  #define LAUNCH_OFF_CALLC	0x18 @@ -44,7 +44,7 @@  #define LAUNCH_OFF_BEVNORMAL	0x40  #define LAUNCH_OFF_BEVECC	0x48 -#define LAUNCH_STATE_DONE	0	/* Return value of LAUNCH_POLL      */ +#define LAUNCH_STATE_DONE	0	/* Return value of LAUNCH_POLL	    */  #define LAUNCH_STATE_SENT	1  #define LAUNCH_STATE_RECD	2 @@ -65,16 +65,16 @@ typedef int launch_state_t;  typedef void (*launch_proc_t)(u64 call_parm);  typedef struct launch_s { -	volatile u64		magic;	/* Magic number                     */ -	volatile u64		busy;	/* Slave currently active           */ +	volatile u64		magic;	/* Magic number			    */ +	volatile u64		busy;	/* Slave currently active	    */  	volatile launch_proc_t	call_addr;	/* Func. for slave to call  */  	volatile u64		call_addr_c;	/* 1's complement of call_addr*/  	volatile u64		call_parm;	/* Single parm passed to call*/  	volatile void *stack_addr;	/* Stack pointer for slave function */  	volatile void *gp_addr;		/* Global pointer for slave func.   */ -	volatile char 		*bevutlb;/* Address of bev utlb ex handler   */ -	volatile char 		*bevnormal;/*Address of bev normal ex handler */ -	volatile char 		*bevecc;/* Address of bev cache err handler */ +	volatile char		*bevutlb;/* Address of bev utlb ex handler   */ +	volatile char		*bevnormal;/*Address of bev normal ex handler */ +	volatile char		*bevecc;/* Address of bev cache err handler */  	volatile char		pad[160];	/* Pad to LAUNCH_SIZEOF	    */  } launch_t;  |