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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-23 17:43:53 -0700 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-23 17:43:53 -0700 | 
| commit | a5ebba6b54bc8038a38d3eacac3a79bbeaf3ee24 (patch) | |
| tree | d36eb26a7efd4e00381bc9f6474ea3ec31340585 /arch/arm/plat-mxc/include/mach/hardware.h | |
| parent | e81218f5f0fd219bd75768d845159ba4810bdd48 (diff) | |
| parent | 6b21a9ce0402e0c5fd2adfa3d41328fdd8f55a9a (diff) | |
| download | olio-linux-3.10-a5ebba6b54bc8038a38d3eacac3a79bbeaf3ee24.tar.xz olio-linux-3.10-a5ebba6b54bc8038a38d3eacac3a79bbeaf3ee24.zip  | |
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc power management changes from Arnd Bergmann:
 "These are various power management related changes, mainly concerning
  cpuidle on i.MX and OMAP, as well as a the move of the omap
  smartreflex driver to live in the power subsystem."
Fix up conflicts in arch/arm/mach-{imx/mach-imx6q.c,omap2/prm2xxx_3xxx.h}
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
  ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge
  ARM: OMAP2+: do not allow SmartReflex to be built as a module
  ARM: OMAP2: Use hwmod to initialize mmc for 2420
  ARM: OMAP3: PM: cpuidle: optimize the clkdm idle latency in C1 state
  ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state
  ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state
  ARM: OMAP3: PM: cleanup cam_pwrdm leftovers
  ARM: OMAP3: PM: call pre/post transition per powerdomain
  ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
  ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle
  ARM: OMAP3PLUS: hwmod: reconfigure IO Daisychain during hwmod mux
  ARM: OMAP3+: PRM: Enable IO wake up
  ARM: OMAP4: PRM: Add IO Daisychain support
  ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file
  ARM: OMAP3: PM: correct enable/disable of daisy io chain
  ARM: OMAP2+: PRM: fix compile for OMAP4-only build
  W1: OMAP HDQ1W: use runtime PM
  ARM: OMAP2+: HDQ1W: use omap_device
  W1: OMAP HDQ1W: use 32-bit register accesses
  W1: OMAP HDQ1W: allow driver to be built on all OMAP2+
  ...
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/hardware.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/hardware.h | 25 | 
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 1d432a75e40..ebf10654bb4 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h @@ -50,7 +50,7 @@   *	IO	0x00200000+0x100000	->	0xf4000000+0x100000   * mx21:   *	AIPI	0x10000000+0x100000	->	0xf4400000+0x100000 - *	SAHB1	0x80000000+0x100000	->	0xf4000000+0x100000 + *	SAHB1	0x80000000+0x100000	->	0xf5000000+0x100000   *	X_MEMC	0xdf000000+0x004000	->	0xf5f00000+0x004000   * mx25:   *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000 @@ -58,47 +58,50 @@   *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000   * mx27:   *	AIPI	0x10000000+0x100000	->	0xf4400000+0x100000 - *	SAHB1	0x80000000+0x100000	->	0xf4000000+0x100000 + *	SAHB1	0x80000000+0x100000	->	0xf5000000+0x100000   *	X_MEMC	0xd8000000+0x100000	->	0xf5c00000+0x100000   * mx31:   *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000   *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000   *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000 - *	X_MEMC	0xb8000000+0x010000	->	0xf4c00000+0x010000 + *	X_MEMC	0xb8000000+0x010000	->	0xf5c00000+0x010000   *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000   * mx35:   *	AIPS1	0x43f00000+0x100000	->	0xf5300000+0x100000   *	AIPS2	0x53f00000+0x100000	->	0xf5700000+0x100000   *	AVIC	0x68000000+0x100000	->	0xf5800000+0x100000 - *	X_MEMC	0xb8000000+0x010000	->	0xf4c00000+0x010000 + *	X_MEMC	0xb8000000+0x010000	->	0xf5c00000+0x010000   *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000   * mx50:   *	TZIC	0x0fffc000+0x004000	->	0xf4bfc000+0x004000 - *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000   *	AIPS1	0x53f00000+0x100000	->	0xf5700000+0x100000 + *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000   *	AIPS2	0x63f00000+0x100000	->	0xf5300000+0x100000   * mx51: - *	TZIC	0xe0000000+0x004000	->	0xf5000000+0x004000 + *	TZIC	0x0fffc000+0x004000	->	0xf4bfc000+0x004000   *	IRAM	0x1ffe0000+0x020000	->	0xf4fe0000+0x020000 + *	DEBUG	0x60000000+0x100000	->	0xf5000000+0x100000   *	SPBA0	0x70000000+0x100000	->	0xf5400000+0x100000   *	AIPS1	0x73f00000+0x100000	->	0xf5700000+0x100000 - *	AIPS2	0x83f00000+0x100000	->	0xf4300000+0x100000 + *	AIPS2	0x83f00000+0x100000	->	0xf5300000+0x100000   * mx53:   *	TZIC	0x0fffc000+0x004000	->	0xf4bfc000+0x004000 + *	DEBUG	0x40000000+0x100000	->	0xf5000000+0x100000   *	SPBA0	0x50000000+0x100000	->	0xf5400000+0x100000   *	AIPS1	0x53f00000+0x100000	->	0xf5700000+0x100000   *	AIPS2	0x63f00000+0x100000	->	0xf5300000+0x100000   * mx6q: - *	SCU	0x00a00000+0x001000	->	0xf4000000+0x001000 + *	SCU	0x00a00000+0x004000	->	0xf4000000+0x004000   *	CCM	0x020c4000+0x004000	->	0xf42c4000+0x004000 - *	ANATOP	0x020c8000+0x001000	->	0xf42c8000+0x001000 + *	ANATOP	0x020c8000+0x004000	->	0xf42c8000+0x004000   *	UART4	0x021f0000+0x004000	->	0xf42f0000+0x004000   */  #define IMX_IO_P2V(x)	(						\ -			0xf4000000 +					\ +			(((x) & 0x80000000) >> 7) |			\ +			(0xf4000000 +					\  			(((x) & 0x50000000) >> 6) +			\  			(((x) & 0x0b000000) >> 4) +			\ -			(((x) & 0x000fffff))) +			(((x) & 0x000fffff))))  #define IMX_IO_ADDRESS(x)	IOMEM(IMX_IO_P2V(x))  |