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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 16:03:32 -0700 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-03-27 16:03:32 -0700 | 
| commit | d61b7a572b292e2be409e13b4b3adf475f18fb29 (patch) | |
| tree | e9d30390860147136c05e66abf1edda1bc5b0562 /arch/arm/mach-s3c24xx/bast-irq.c | |
| parent | 18d9946bc7e2252fe3c0f2f609ac383c627edefd (diff) | |
| parent | f4e2467bad53023589cbff18dd1ab6e0aa3f004c (diff) | |
| download | olio-linux-3.10-d61b7a572b292e2be409e13b4b3adf475f18fb29.tar.xz olio-linux-3.10-d61b7a572b292e2be409e13b4b3adf475f18fb29.zip  | |
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: global cleanups" from Arnd Bergmann:
 "Quite a bit of code gets removed, and some stuff moved around, mostly
  the old samsung s3c24xx stuff.  There should be no functional changes
  in this series otherwise.  Some cleanups have dependencies on other
  arm-soc branches and will be sent in the second round.
  Signed-off-by: Arnd Bergmann <arnd@arndb.de>"
Fixed up trivial conflicts mainly due to #include's being changes on
both sides.
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (121 commits)
  ep93xx: Remove unnecessary includes of ep93xx-regs.h
  ep93xx: Move EP93XX_SYSCON defines to SoC private header
  ep93xx: Move crunch code to mach-ep93xx directory
  ep93xx: Make syscon access functions private to SoC
  ep93xx: Configure GPIO ports in core code
  ep93xx: Move peripheral defines to local SoC header
  ep93xx: Convert the watchdog driver into a platform device.
  ep93xx: Use ioremap for backlight driver
  ep93xx: Move GPIO defines to gpio-ep93xx.h
  ep93xx: Don't use system controller defines in audio drivers
  ep93xx: Move PHYS_BASE defines to local SoC header file
  ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver
  ARM: EXYNOS: add clock registers for exynos4x12-cpufreq
  PM / devfreq: update the name of EXYNOS clock registers that were omitted
  PM / devfreq: update the name of EXYNOS clock register
  ARM: EXYNOS: change the prefix S5P_ to EXYNOS4_ for clock
  ARM: EXYNOS: use static declaration on regarding clock
  ARM: EXYNOS: replace clock.c for other new EXYNOS SoCs
  ARM: OMAP2+: Fix build error after merge
  ARM: S3C24XX: remove call to s3c24xx_setup_clocks
  ...
Diffstat (limited to 'arch/arm/mach-s3c24xx/bast-irq.c')
| -rw-r--r-- | arch/arm/mach-s3c24xx/bast-irq.c | 166 | 
1 files changed, 166 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c new file mode 100644 index 00000000000..ac7b2ad5c40 --- /dev/null +++ b/arch/arm/mach-s3c24xx/bast-irq.c @@ -0,0 +1,166 @@ +/* linux/arch/arm/mach-s3c2410/bast-irq.c + * + * Copyright 2003-2005 Simtec Electronics + *   Ben Dooks <ben@simtec.co.uk> + * + * http://www.simtec.co.uk/products/EB2410ITX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA +*/ + + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/ioport.h> +#include <linux/device.h> +#include <linux/io.h> + +#include <asm/mach-types.h> + +#include <mach/hardware.h> +#include <asm/irq.h> + +#include <asm/mach/irq.h> + +#include <mach/regs-irq.h> +#include <mach/bast-map.h> +#include <mach/bast-irq.h> + +#include <plat/irq.h> + +#if 0 +#include <asm/debug-ll.h> +#endif + +#define irqdbf(x...) +#define irqdbf2(x...) + + +/* handle PC104 ISA interrupts from the system CPLD */ + +/* table of ISA irq nos to the relevant mask... zero means + * the irq is not implemented +*/ +static unsigned char bast_pc104_irqmasks[] = { +	0,   /* 0 */ +	0,   /* 1 */ +	0,   /* 2 */ +	1,   /* 3 */ +	0,   /* 4 */ +	2,   /* 5 */ +	0,   /* 6 */ +	4,   /* 7 */ +	0,   /* 8 */ +	0,   /* 9 */ +	8,   /* 10 */ +	0,   /* 11 */ +	0,   /* 12 */ +	0,   /* 13 */ +	0,   /* 14 */ +	0,   /* 15 */ +}; + +static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; + +static void +bast_pc104_mask(struct irq_data *data) +{ +	unsigned long temp; + +	temp = __raw_readb(BAST_VA_PC104_IRQMASK); +	temp &= ~bast_pc104_irqmasks[data->irq]; +	__raw_writeb(temp, BAST_VA_PC104_IRQMASK); +} + +static void +bast_pc104_maskack(struct irq_data *data) +{ +	struct irq_desc *desc = irq_desc + IRQ_ISA; + +	bast_pc104_mask(data); +	desc->irq_data.chip->irq_ack(&desc->irq_data); +} + +static void +bast_pc104_unmask(struct irq_data *data) +{ +	unsigned long temp; + +	temp = __raw_readb(BAST_VA_PC104_IRQMASK); +	temp |= bast_pc104_irqmasks[data->irq]; +	__raw_writeb(temp, BAST_VA_PC104_IRQMASK); +} + +static struct irq_chip  bast_pc104_chip = { +	.irq_mask	= bast_pc104_mask, +	.irq_unmask	= bast_pc104_unmask, +	.irq_ack	= bast_pc104_maskack +}; + +static void +bast_irq_pc104_demux(unsigned int irq, +		     struct irq_desc *desc) +{ +	unsigned int stat; +	unsigned int irqno; +	int i; + +	stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; + +	if (unlikely(stat == 0)) { +		/* ack if we get an irq with nothing (ie, startup) */ + +		desc = irq_desc + IRQ_ISA; +		desc->irq_data.chip->irq_ack(&desc->irq_data); +	} else { +		/* handle the IRQ */ + +		for (i = 0; stat != 0; i++, stat >>= 1) { +			if (stat & 1) { +				irqno = bast_pc104_irqs[i]; +				generic_handle_irq(irqno); +			} +		} +	} +} + +static __init int bast_irq_init(void) +{ +	unsigned int i; + +	if (machine_is_bast()) { +		printk(KERN_INFO "BAST PC104 IRQ routing, Copyright 2005 Simtec Electronics\n"); + +		/* zap all the IRQs */ + +		__raw_writeb(0x0, BAST_VA_PC104_IRQMASK); + +		irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux); + +		/* register our IRQs */ + +		for (i = 0; i < 4; i++) { +			unsigned int irqno = bast_pc104_irqs[i]; + +			irq_set_chip_and_handler(irqno, &bast_pc104_chip, +						 handle_level_irq); +			set_irq_flags(irqno, IRQF_VALID); +		} +	} + +	return 0; +} + +arch_initcall(bast_irq_init);  |