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| author | Jiri Kosina <jkosina@suse.cz> | 2011-09-15 15:08:05 +0200 | 
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2011-09-15 15:08:18 +0200 | 
| commit | e060c38434b2caa78efe7cedaff4191040b65a15 (patch) | |
| tree | 407361230bf6733f63d8e788e4b5e6566ee04818 /arch/arm/mach-pxa/irq.c | |
| parent | 10e4ac572eeffe5317019bd7330b6058a400dfc2 (diff) | |
| parent | cc39c6a9bbdebfcf1a7dee64d83bf302bc38d941 (diff) | |
| download | olio-linux-3.10-e060c38434b2caa78efe7cedaff4191040b65a15.tar.xz olio-linux-3.10-e060c38434b2caa78efe7cedaff4191040b65a15.zip  | |
Merge branch 'master' into for-next
Fast-forward merge with Linus to be able to merge patches
based on more recent version of the tree.
Diffstat (limited to 'arch/arm/mach-pxa/irq.c')
| -rw-r--r-- | arch/arm/mach-pxa/irq.c | 36 | 
1 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 32ed551bf9c..b09e848eb6c 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -37,6 +37,8 @@  #define IPR(i)			(((i) < 32) ? (0x01c + ((i) << 2)) :		\  				((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) :	\  				      (0x144 + (((i) - 64) << 2))) +#define ICHP_VAL_IRQ		(1 << 31) +#define ICHP_IRQ(i)		(((i) >> 16) & 0x7fff)  #define IPR_VALID		(1 << 31)  #define IRQ_BIT(n)		(((n) - PXA_IRQ(0)) & 0x1f) @@ -64,7 +66,7 @@ static inline void __iomem *irq_base(int i)  	return (void __iomem *)io_p2v(phys_base[i]);  } -static void pxa_mask_irq(struct irq_data *d) +void pxa_mask_irq(struct irq_data *d)  {  	void __iomem *base = irq_data_get_irq_chip_data(d);  	uint32_t icmr = __raw_readl(base + ICMR); @@ -73,7 +75,7 @@ static void pxa_mask_irq(struct irq_data *d)  	__raw_writel(icmr, base + ICMR);  } -static void pxa_unmask_irq(struct irq_data *d) +void pxa_unmask_irq(struct irq_data *d)  {  	void __iomem *base = irq_data_get_irq_chip_data(d);  	uint32_t icmr = __raw_readl(base + ICMR); @@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = {  	.irq_set_type	= pxa_set_low_gpio_type,  }; +asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) +{ +	uint32_t icip, icmr, mask; + +	do { +		icip = __raw_readl(IRQ_BASE + ICIP); +		icmr = __raw_readl(IRQ_BASE + ICMR); +		mask = icip & icmr; + +		if (mask == 0) +			break; + +		handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); +	} while (1); +} + +asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) +{ +	uint32_t ichp; + +	do { +		__asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); + +		if ((ichp & ICHP_VAL_IRQ) == 0) +			break; + +		handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); +	} while (1); +} +  static void __init pxa_init_low_gpio_irq(set_wake_t fn)  {  	int irq;  |