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authorArnd Bergmann <arnd@arndb.de>2013-04-08 19:40:57 +0200
committerArnd Bergmann <arnd@arndb.de>2013-04-08 19:40:57 +0200
commit86feb64f5bfe75da74f4a2faf18b5e57be9cde5e (patch)
tree410e5dbd7e23b32671cc297e52b42a0d6595f454 /arch/arm/mach-omap2/gpmc-smc91x.c
parentdc2d3db8137fba0f62d7517e1bea8a47f69fcbc4 (diff)
parentaecb65a34a780cd07fbaa652cc5d640f13f3ed5f (diff)
downloadolio-linux-3.10-86feb64f5bfe75da74f4a2faf18b5e57be9cde5e.tar.xz
olio-linux-3.10-86feb64f5bfe75da74f4a2faf18b5e57be9cde5e.zip
Merge tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
From Tony Lindgren <tony@atomide.com>: GPMC updates from Jon Hunter <jon-hunter@ti.com>: Adds GPMC (General Purpose Memory Controller) DT support for NOR flash and Ethernet and includes various GPMC cleans-up and fixes. This series is dependent on commit 7185684 (ARM: OMAP: use consistent error checking) from RMK's clean-up branch and commit 31d9adc (ARM: OMAP2+: Fix broken gpmc support). * tag 'omap-for-v3.10/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits) ARM: OMAP2+: Add GPMC DT support for Ethernet child nodes ARM: OMAP2+: rename gpmc_probe_nor_child() to gpmc_probe_generic_child() ARM: OMAP2+: return -ENODEV if GPMC child device creation fails ARM: OMAP2+: Allow GPMC probe to complete even if CS mapping fails ARM: OMAP2+: Remove unnecesssary GPMC definitions and variable ARM: OMAP2+: Detect incorrectly aligned GPMC base address ARM: OMAP2+: Convert ONENAND to retrieve GPMC settings from DT ARM: OMAP2+: Convert NAND to retrieve GPMC settings from DT ARM: OMAP2+: Add device-tree support for NOR flash ARM: OMAP2+: Add additional GPMC timing parameters ARM: OMAP2+: Add function to read GPMC settings from device-tree ARM: OMAP2+: Don't configure of chip-select options in gpmc_cs_configure() ARM: OMAP2+: Convert TUSB to use gpmc_cs_program_settings() ARM: OMAP2+: Convert SMC91x to use gpmc_cs_program_settings() ARM: OMAP2+: Convert NAND to use gpmc_cs_program_settings() ARM: OMAP2+: Convert ONENAND to use gpmc_cs_program_settings() ARM: OMAP2+: Add function for configuring GPMC settings ARM: OMAP2+: Add structure for storing GPMC settings ARM: OMAP2+: Add variable to store number of GPMC waitpins ARM: OMAP2+: Simplify code configuring ONENAND devices ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2/gpmc-smc91x.c')
-rw-r--r--arch/arm/mach-omap2/gpmc-smc91x.c30
1 files changed, 17 insertions, 13 deletions
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index 11d0b756f09..61a063595e6 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -49,6 +49,10 @@ static struct platform_device gpmc_smc91x_device = {
.resource = gpmc_smc91x_resources,
};
+static struct gpmc_settings smc91x_settings = {
+ .device_width = GPMC_DEVWIDTH_16BIT,
+};
+
/*
* Set the gpmc timings for smc91c96. The timings are taken
* from the data sheet available at:
@@ -67,18 +71,6 @@ static int smc91c96_gpmc_retime(void)
const int t7 = 5; /* Figure 12.4 write */
const int t8 = 5; /* Figure 12.4 write */
const int t20 = 185; /* Figure 12.2 read and 12.4 write */
- u32 l;
-
- l = GPMC_CONFIG1_DEVICESIZE_16;
- if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
- l |= GPMC_CONFIG1_MUXADDDATA;
- if (gpmc_cfg->flags & GPMC_READ_MON)
- l |= GPMC_CONFIG1_WAIT_READ_MON;
- if (gpmc_cfg->flags & GPMC_WRITE_MON)
- l |= GPMC_CONFIG1_WAIT_WRITE_MON;
- if (gpmc_cfg->wait_pin)
- l |= GPMC_CONFIG1_WAIT_PIN_SEL(gpmc_cfg->wait_pin);
- gpmc_cs_write_reg(gpmc_cfg->cs, GPMC_CS_CONFIG1, l);
/*
* FIXME: Calculate the address and data bus muxed timings.
@@ -104,7 +96,7 @@ static int smc91c96_gpmc_retime(void)
dev_t.t_cez_w = t4_w * 1000;
dev_t.t_wr_cycle = (t20 - t3) * 1000;
- gpmc_calc_timings(&t, &dev_t);
+ gpmc_calc_timings(&t, &smc91x_settings, &dev_t);
return gpmc_cs_set_timings(gpmc_cfg->cs, &t);
}
@@ -133,6 +125,18 @@ void __init gpmc_smc91x_init(struct omap_smc91x_platform_data *board_data)
gpmc_smc91x_resources[0].end = cs_mem_base + 0x30f;
gpmc_smc91x_resources[1].flags |= (gpmc_cfg->flags & IRQF_TRIGGER_MASK);
+ if (gpmc_cfg->flags & GPMC_MUX_ADD_DATA)
+ smc91x_settings.mux_add_data = GPMC_MUX_AD;
+ if (gpmc_cfg->flags & GPMC_READ_MON)
+ smc91x_settings.wait_on_read = true;
+ if (gpmc_cfg->flags & GPMC_WRITE_MON)
+ smc91x_settings.wait_on_write = true;
+ if (gpmc_cfg->wait_pin)
+ smc91x_settings.wait_pin = gpmc_cfg->wait_pin;
+ ret = gpmc_cs_program_settings(gpmc_cfg->cs, &smc91x_settings);
+ if (ret < 0)
+ goto free1;
+
if (gpmc_cfg->retime) {
ret = gpmc_cfg->retime();
if (ret != 0)