diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 16:14:15 +0100 | 
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 09:55:48 +0100 | 
| commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
| tree | 69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-ixp2000/include/mach/uncompress.h | |
| parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) | |
| download | olio-linux-3.10-a09e64fbc0094e3073dbb09c3b4bfe4ab669244b.tar.xz olio-linux-3.10-a09e64fbc0094e3073dbb09c3b4bfe4ab669244b.zip  | |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ixp2000/include/mach/uncompress.h')
| -rw-r--r-- | arch/arm/mach-ixp2000/include/mach/uncompress.h | 47 | 
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/uncompress.h b/arch/arm/mach-ixp2000/include/mach/uncompress.h new file mode 100644 index 00000000000..ce363087df7 --- /dev/null +++ b/arch/arm/mach-ixp2000/include/mach/uncompress.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-ixp2000/include/mach/uncompress.h + * + * + * Original Author: Naeem Afzal <naeem.m.afzal@intel.com> + * Maintainer: Deepak Saxena <dsaxena@plexity.net> + * + * Copyright 2002 Intel Corp. + * + *  This program is free software; you can redistribute  it and/or modify it + *  under  the terms of  the GNU General  Public License as published by the + *  Free Software Foundation;  either version 2 of the  License, or (at your + *  option) any later version. + * + */ + +#include <linux/serial_reg.h> + +#define UART_BASE	0xc0030000 + +#define PHYS(x)          ((volatile unsigned long *)(UART_BASE + x)) + +#define UARTDR          PHYS(0x00)      /* Transmit reg dlab=0 */ +#define UARTDLL         PHYS(0x00)      /* Divisor Latch reg dlab=1*/ +#define UARTDLM         PHYS(0x04)      /* Divisor Latch reg dlab=1*/ +#define UARTIER         PHYS(0x04)      /* Interrupt enable reg */ +#define UARTFCR         PHYS(0x08)      /* FIFO control reg dlab =0*/ +#define UARTLCR         PHYS(0x0c)      /* Control reg */ +#define UARTSR          PHYS(0x14)      /* Status reg */ + + +static inline void putc(int c) +{ +	int j = 0x1000; + +	while (--j && !(*UARTSR & UART_LSR_THRE)) +		barrier(); + +	*UARTDR = c; +} + +static inline void flush(void) +{ +} + +#define arch_decomp_setup() +#define arch_decomp_wdog()  |