diff options
| author | Jee Su Chang <w20740@motorola.com> | 2014-05-04 14:14:55 -0500 |
|---|---|---|
| committer | Jee Su Chang <w20740@motorola.com> | 2014-05-04 14:14:55 -0500 |
| commit | d9e15ffe03f3be4a7de2e320798728830c1f3057 (patch) | |
| tree | 48a43e096fe2c2c902f9f1a8359aed846a4c4101 | |
| parent | 82e085f9dd609b78b8ce8bed440a62a643c99df0 (diff) | |
| download | olio-linux-3.10-d9e15ffe03f3be4a7de2e320798728830c1f3057.tar.xz olio-linux-3.10-d9e15ffe03f3be4a7de2e320798728830c1f3057.zip | |
IKXCLOCK-1029 c55: optimize gpio pins during when c55 is off
Change-Id: I1d046bd680ff4aaa0de13a4cb162cf946a17e38f
| -rw-r--r-- | arch/arm/boot/dts/omap3-minnow.dtsi | 58 | ||||
| -rw-r--r-- | drivers/misc/c55_ctrl.c | 50 |
2 files changed, 93 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/omap3-minnow.dtsi b/arch/arm/boot/dts/omap3-minnow.dtsi index ffed500890d..9b4bfd52842 100644 --- a/arch/arm/boot/dts/omap3-minnow.dtsi +++ b/arch/arm/boot/dts/omap3-minnow.dtsi @@ -97,6 +97,9 @@ <&gpio3 17 2>; /* gpio_c55_int gpio-81*/ vddc-supply = <&ldo9_reg>; vddldo-supply = <&ldo3_reg>; + pinctrl-names = "off", "on"; + pinctrl-0 = <&c55_pins_off>; + pinctrl-1 = <&c55_pins_on>; }; vib-gpio { @@ -528,7 +531,6 @@ 0x0ae 0x001 /* DSS_DATA1, MODE1 | OUTPUT */ 0x0b0 0x001 /* DSS_DATA2, MODE1 | OUTPUT */ 0x0b2 0x001 /* DSS_DATA3, MODE1 | OUTPUT */ - 0x0b8 0x104 /* DSS_DATA6, MODE4 | INPUT */ 0x0bc 0x004 /* DSS_DATA8, MODE4 | OUTPUT */ 0x0c2 0x004 /* DSS_DATA11, MODE4 | OUTPUT */ 0x0c6 0x004 /* DSS_DATA13, MODE4 | OUTPUT */ @@ -537,19 +539,11 @@ 0x0e4 0x004 /* CAM_FLD, MODE4 | OUTPUT */ 0x0e6 0x11c /* CAM_D0, MODE4 | INPUT_PULLUP */ 0x122 0x004 /* SIM_CLK, MODE4 | OUTPUT */ - 0x124 0x104 /* SIM_PWRCTRL, MODE4 | INPUT */ + 0x124 0x00f /* SIM_PWRCTRL, MODE7 | PULLDOWN */ 0x144 0x100 /* UART2_CTS, MODE0 | OUTPUT */ 0x146 0x000 /* UART2_RTS, MODE0 | OUTPUT */ 0x148 0x000 /* UART2_TX, MODE0 | INPUT */ 0x14a 0x100 /* UART2_RX, MODE0 | INPUT */ - 0x14c 0x000 /* UART1_TX, MODE0 | OUTPUT */ - 0x14e 0x000 /* UART1_RTS, MODE0 | OUTPUT */ - 0x150 0x100 /* UART1_CTS, MODE0 | INPUT */ - 0x152 0x100 /* UART1_RX, MODE0 | INPUT */ - 0x154 0x100 /* MCBSP4_CLKX, MODE0 | INPUT */ - 0x156 0x100 /* MCBSP4_DR, MODE0 | INPUT */ - 0x158 0x000 /* MCBSP4_DX, MODE0 | OUTPUT */ - 0x15a 0x118 /* MCBSP4_FSX,MODE0 | INPUT_PULLUP */ 0x168 0x104 /* MCBSP1_CLKX, MODE4 | INPUT */ 0x16c 0x004 /* UART3_RTS_SD, MODE4 | OUTPUT */ 0x16e 0x118 /* UART3_RX, MODEO | INPUT_PULLUP */ @@ -620,11 +614,45 @@ spi_flash_pins_off: pinmux_m25p_pins_off { pinctrl-single,pins = < - 0x0ca 0x107 /* DSS_DATA15, MODE7 (SAFE) | INPUT */ - 0x1a6 0x107 /* MCSPI2_CLK, MODE7 (SAFE) | INPUT */ - 0x1a8 0x107 /* MCSPI2_SIMO, MODE7 (SAFE) | INPUT */ - 0x1aa 0x107 /* MCSPI2_SOMI, MODE7 (SAFE) | INPUT */ - 0x1ac 0x107 /* MCSPI2_CS0, MODE7 (SAFE) | INPUT */ + 0x0ca 0x007 /* DSS_DATA15, MODE7 */ + 0x1a6 0x007 /* MCSPI2_CLK, MODE7 */ + 0x1a8 0x007 /* MCSPI2_SIMO, MODE7 */ + 0x1aa 0x007 /* MCSPI2_SOMI, MODE7 */ + 0x1ac 0x007 /* MCSPI2_CS0, MODE7 */ + >; + }; + + c55_pins_off: pinmux_c55_pins_off { + pinctrl-single,pins = < + 0x0b8 0x00f /* DSS_DATA6, MODE7 | PULLDOWN */ + 0x110 0x00f /* MCBSP2_DR, MODE7 | PULLDOWN */ + 0x10c 0x00f /* MCBSP2_FSX, MODE7 | PULLDOWN */ + 0x10e 0x00f /* MCBSP2_CLKX, MODE7 | PULLDOWN */ + 0x14c 0x00f /* UART1_TX, MODE7 | PULLDOWN */ + 0x14e 0x00f /* UART1_RTS, MODE7 | PULLDOWN */ + 0x150 0x00f /* UART1_CTS, MODE7 | PULLDOWN */ + 0x152 0x00f /* UART1_RX, MODE7 | PULLDOWN */ + 0x154 0x00f /* MCBSP4_CLKX, MODE7 | PULLDOWN */ + 0x156 0x00f /* MCBSP4_DR, MODE7 | PULLDOWN */ + 0x158 0x00f /* MCBSP4_DX, MODE7 | PULLDOWN */ + 0x15a 0x00f /* MCBSP4_FSX, MODE7 | PULLDOWN */ + >; + }; + + c55_pins_on: pinmux_c55_pins_on { + pinctrl-single,pins = < + 0x0b8 0x104 /* DSS_DATA6, MODE4 | INPUT */ + 0x110 0x007 /* MCBSP2_DR, MODE7 */ + 0x10c 0x007 /* MCBSP2_FSX, MODE7 */ + 0x10e 0x007 /* MCBSP2_CLKX, MODE7 */ + 0x14c 0x000 /* UART1_TX, MODE0 | OUTPUT */ + 0x14e 0x000 /* UART1_RTS, MODE0 | OUTPUT */ + 0x150 0x118 /* UART1_CTS, MODE0 | INPUT | PULLUP */ + 0x152 0x118 /* UART1_RX, MODE0 | INPUT | PULLUP */ + 0x154 0x108 /* MCBSP4_CLKX, MODE0 | INPUT | PULLDOWN */ + 0x156 0x108 /* MCBSP4_DR, MODE0 | INPUT | PULLDOWN */ + 0x158 0x000 /* MCBSP4_DX, MODE0 | OUTPUT */ + 0x15a 0x108 /* MCBSP4_FSX, MODE0 | INPUT | PULLDOWN */ >; }; diff --git a/drivers/misc/c55_ctrl.c b/drivers/misc/c55_ctrl.c index 31dbd6cde57..507732514cb 100644 --- a/drivers/misc/c55_ctrl.c +++ b/drivers/misc/c55_ctrl.c @@ -38,10 +38,17 @@ struct c55_ctrl_data { struct wake_lock wake_lock; struct regulator *reg_vddc; struct regulator *reg_vddldo; + struct pinctrl *pctrl; + struct pinctrl_state *states[C55_MODE_MAX]; int c55_mode; struct mutex ctrl_mutex; /* mutex to handle critical area */ }; +const char *c55_pin_state_labels[C55_MODE_MAX] = { + "off", + "on" +}; + #define NUM_GPIOS 2 const char *gpio_labels[NUM_GPIOS] = { @@ -156,6 +163,8 @@ static ssize_t c55_ctrl_enable(struct device *dev, mutex_lock(&cdata->ctrl_mutex); if (mode == C55_ON) { + pinctrl_select_state(cdata->pctrl, cdata->states[C55_ON]); + gpio_set_value(cdata->ap_c55_int_gpio, 1); if (m4sensorhub_reg_write_1byte @@ -190,6 +199,8 @@ static ssize_t c55_ctrl_enable(struct device *dev, * for current drain reasons */ gpio_set_value(cdata->ap_c55_int_gpio, 0); + pinctrl_select_state(cdata->pctrl, cdata->states[C55_OFF]); + /* Unlock wake lock in case it is active */ wake_unlock(&cdata->wake_lock); } @@ -205,6 +216,38 @@ static ssize_t c55_ctrl_enable(struct device *dev, static DEVICE_ATTR(enable, S_IWUSR | S_IWGRP, NULL, c55_ctrl_enable); +static int c55_ctrl_pin_setup(struct device *dev, struct c55_ctrl_data *cdata) +{ + int i, ret = 0; + + cdata->pctrl = devm_pinctrl_get(dev); + if (IS_ERR(cdata->pctrl)) { + ret = PTR_ERR(cdata->pctrl); + dev_dbg(dev, "no pinctrl handle\n"); + } + + for (i = 0; !ret && (i < C55_MODE_MAX); i++) { + cdata->states[i] = pinctrl_lookup_state(cdata->pctrl, + c55_pin_state_labels[i]); + if (IS_ERR(cdata->states[i])) { + ret = PTR_ERR(cdata->states[i]); + dev_dbg(dev, "no %s pinctrl state\n", + c55_pin_state_labels[i]); + } + } + + if (!ret) { + ret = pinctrl_select_state(cdata->pctrl, + cdata->states[C55_OFF]); + if (ret) + dev_dbg(dev, "failed to activate %s pinctrl state\n", + c55_pin_state_labels[C55_OFF]); + } + + return ret; +} + + static int c55_ctrl_probe(struct platform_device *pdev) { struct c55_ctrl_data *cdata; @@ -223,6 +266,13 @@ static int c55_ctrl_probe(struct platform_device *pdev) mutex_init(&cdata->ctrl_mutex); + ret = c55_ctrl_pin_setup(&pdev->dev, cdata); + if (ret) { + dev_err(&pdev->dev, "%s: c55_ctrl_pin_setup failed.\n", + __func__); + return ret; + } + cdata->c55_ap_int_gpio = -1; cdata->ap_c55_int_gpio = -1; ret = c55_ctrl_gpio_setup(cdata, &pdev->dev); |