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| author | Ralf Baechle <ralf@linux-mips.org> | 2012-01-11 15:37:16 +0100 | 
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-01-11 15:37:16 +0100 | 
| commit | d7a887a73dec6c387b02a966a71aac767bbd9ce6 (patch) | |
| tree | f32a5f2151b9fe4de1491b601db2e3587d3d52c0 | |
| parent | c539ef7d355219c7b0e16cc302bf179fcad936b3 (diff) | |
| download | olio-linux-3.10-d7a887a73dec6c387b02a966a71aac767bbd9ce6.tar.xz olio-linux-3.10-d7a887a73dec6c387b02a966a71aac767bbd9ce6.zip  | |
MIPS: Delete unused function add_temporary_entry.
Only available for R4000 style TLBs anyway and proper ordering of
initialization code made this crude interface unncecessary.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/pgtable-32.h | 11 | ||||
| -rw-r--r-- | arch/mips/mm/tlb-r4k.c | 47 | 
2 files changed, 0 insertions, 58 deletions
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h index 8a153d2fa62..d169c07c38e 100644 --- a/arch/mips/include/asm/pgtable-32.h +++ b/arch/mips/include/asm/pgtable-32.h @@ -24,17 +24,6 @@  extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,  			       unsigned long entryhi, unsigned long pagemask); -/* - * - add_temporary_entry() add a temporary TLB entry. We use TLB entries - *	starting at the top and working down. This is for populating the - *	TLB before trap_init() puts the TLB miss handler in place. It - *	should be used only for entries matching the actual page tables, - *	to prevent inconsistencies. - */ -extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, -			       unsigned long entryhi, unsigned long pagemask); - -  /* Basically we have the same two-level (which is the logical three level   * Linux page table layout folded) page tables as the i386.  Some day   * when we have proper page coloring support we can have a 1% quicker diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 88dc49cfa16..74d67c88574 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -376,51 +376,6 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,  	EXIT_CRITICAL(flags);  } -/* - * Used for loading TLB entries before trap_init() has started, when we - * don't actually want to add a wired entry which remains throughout the - * lifetime of the system - */ - -static int temp_tlb_entry __cpuinitdata; - -__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1, -			       unsigned long entryhi, unsigned long pagemask) -{ -	int ret = 0; -	unsigned long flags; -	unsigned long wired; -	unsigned long old_pagemask; -	unsigned long old_ctx; - -	ENTER_CRITICAL(flags); -	/* Save old context and create impossible VPN2 value */ -	old_ctx = read_c0_entryhi(); -	old_pagemask = read_c0_pagemask(); -	wired = read_c0_wired(); -	if (--temp_tlb_entry < wired) { -		printk(KERN_WARNING -		       "No TLB space left for add_temporary_entry\n"); -		ret = -ENOSPC; -		goto out; -	} - -	write_c0_index(temp_tlb_entry); -	write_c0_pagemask(pagemask); -	write_c0_entryhi(entryhi); -	write_c0_entrylo0(entrylo0); -	write_c0_entrylo1(entrylo1); -	mtc0_tlbw_hazard(); -	tlb_write_indexed(); -	tlbw_use_hazard(); - -	write_c0_entryhi(old_ctx); -	write_c0_pagemask(old_pagemask); -out: -	EXIT_CRITICAL(flags); -	return ret; -} -  static int __cpuinitdata ntlb;  static int __init set_ntlb(char *str)  { @@ -458,8 +413,6 @@ void __cpuinit tlb_init(void)  		write_c0_pagegrain(pg);  	} -	temp_tlb_entry = current_cpu_data.tlbsize - 1; -          /* From this point on the ARC firmware is dead.  */  	local_flush_tlb_all();  |