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| author | Viditha Hanumanthareddy <ngjq36@motorola.com> | 2014-07-25 13:49:11 -0500 |
|---|---|---|
| committer | Viditha Hanumanthareddy <ngjq36@motorola.com> | 2014-07-25 14:10:09 -0500 |
| commit | c389cebb09b1a4d9092fdd973c624c52789fe4e1 (patch) | |
| tree | 546ec383a9da1a5b45e9209e87dbd311c0a89360 | |
| parent | 9430435d3483650a6f1001629493fa715041b117 (diff) | |
| download | olio-linux-3.10-c389cebb09b1a4d9092fdd973c624c52789fe4e1.tar.xz olio-linux-3.10-c389cebb09b1a4d9092fdd973c624c52789fe4e1.zip | |
IKXCLOCK-3245: Configuration for m4 reset pin
Change-Id: Ieae14f3a4891603ced46d59c9ff7a0d79da3bd23
| -rw-r--r-- | arch/arm/boot/dts/omap3-minnow.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/control.c | 10 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-minnow.dtsi b/arch/arm/boot/dts/omap3-minnow.dtsi index b2d6a60f538..ce58b173e84 100644 --- a/arch/arm/boot/dts/omap3-minnow.dtsi +++ b/arch/arm/boot/dts/omap3-minnow.dtsi @@ -626,6 +626,7 @@ tps65912_0: tps65912 { 0x102 0x00f /* CAM_STROBE, GPIO 126, MODE7 | PD */ 0x122 0x004 /* SIM_CLK, MODE4 | OUTPUT */ 0x124 0x00f /* SIM_PWRCTRL, MODE7 | PULLDOWN */ + 0x126 0x004 /* SIM_RST, MODE4, GPIO129*/ 0x13e 0x00F /* MCBSP3_DR, MODE7 | PULLDOWN */ 0x15c 0x10f /* MCBSP1_CLKR, GPIO 156, MODE7 | PD */ 0x168 0x104 /* MCBSP1_CLKX, MODE4 | INPUT */ diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 67dd881c23b..ab5ec4b28ab 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -245,6 +245,16 @@ void omap3_ctrl_write_boot_mode(u8 bootmode) void omap3_enable_usim_buffer(void) { u32 reg; + /* + * Configure USIM pins for 1.8V control and disable high-z state + * CTRL_PBIAS_LITE = 0x20b + */ + reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE); + reg |= (OMAP2_PBIASLITEVMODE0 | OMAP2_PBIASLITEPWRDNZ0); + reg |= OMAP343X_PBIASLITEPWRDNZ1; + reg &= ~OMAP343X_PBIASLITEVMODE1; + reg &= ~OMAP2_PBIASSPEEDCTRL0; + omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE); reg = omap_ctrl_readl(OMAP343X_CONTROL_WKUP_CTRL); reg |= OMAP343X_USIM_IO_PWRDNZ; |