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| author | Kumar Gala <galak@kernel.crashing.org> | 2007-06-25 15:19:48 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-06-29 01:58:20 -0500 |
| commit | ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed (patch) | |
| tree | aa4110045c5089ca0d498bdb32af29f3dfdf1d1a | |
| parent | dfac6faf8f42d5a9dd6919d7a2a41ef91eb77b4f (diff) | |
| download | olio-linux-3.10-ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed.tar.xz olio-linux-3.10-ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed.zip | |
[POWERPC] Added indirect_type to handle variants of PCI ops
The generic PCI config ops indirect support for ppc32 covers only two
cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type.
Added a indirect_type bit mask to handle other variants.
Added support for PCI-e extended registers and moved the cfg_type
handling into the bit mask for ARCH=powerpc. We can also use this to
handle indirect quirks.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/sysdev/indirect_pci.c | 22 | ||||
| -rw-r--r-- | include/asm-ppc/pci-bridge.h | 10 |
2 files changed, 26 insertions, 6 deletions
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index efe3cff8dcd..3a1612253c6 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -33,22 +33,27 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; - u32 bus_no; + u32 bus_no, reg; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; - if (hose->set_cfg_type) + if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) if (bus->number != hose->first_busno) cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? hose->self_busno : bus->number; + if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) + reg = ((offset & 0xf00) << 16) | (offset & 0xfc); + else + reg = offset & 0xfc; + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); + | (devfn << 8) | reg | cfg_type)); /* * Note: the caller has already checked that offset is @@ -76,22 +81,27 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, struct pci_controller *hose = bus->sysdata; volatile void __iomem *cfg_data; u8 cfg_type = 0; - u32 bus_no; + u32 bus_no, reg; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; - if (hose->set_cfg_type) + if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) if (bus->number != hose->first_busno) cfg_type = 1; bus_no = (bus->number == hose->first_busno) ? hose->self_busno : bus->number; + if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) + reg = ((offset & 0xf00) << 16) | (offset & 0xfc); + else + reg = offset & 0xfc; + PCI_CFG_OUT(hose->cfg_addr, (0x80000000 | (bus_no << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); + | (devfn << 8) | reg | cfg_type)); /* * Note: the caller has already checked that offset is diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 70aab669104..0dee56b839a 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -65,9 +65,19 @@ struct pci_controller { /* * If set, indirect method will set the cfg_type bit as * needed to generate type 1 configuration transactions. + * use only on ARCH=ppc */ int set_cfg_type; + /* + * Used for variants of PCI indirect handling and possible quirks: + * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 + * EXT_REG - provides access to PCI-e extended registers + */ +#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) +#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) + u32 indirect_type; + /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more */ |