/*
 * (C) Copyright 2004-2011
 * Texas Instruments, <www.ti.com>
 *
 * Author :
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * Derived from Beagle Board and 3430 SDP code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/errno.h>
#include "h1.h"
#include <command.h>
#include <power/tps65910.h>
#include <i2c.h>
#include <asm/arch/musb.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/am35x_def.h>
#include <i2c.h>
#include <linux/compiler.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
#include <asm/omap_musb.h>

#ifdef CONFIG_USB_EHCI
#include <usb.h>
#include <asm/ehci-omap.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

#define USB_CS 17


static struct omap_usbhs_board_data usbhs_bdata = {
	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};

int ehci_hcd_init(int index, enum usb_init_type init,
		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}

int ehci_hcd_stop(int index)
{
	return omap_ehci_hcd_stop();
}

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_H1;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	int pop_mfr, pop_id;

	/*
	 * We need to identify what PoP memory is on the board so that
	 * we know what timings to use.  If we can't identify it then
	 * we know it's an xM.  To map the ID values please see nand_ids.c
	 */
	identify_nand_chip(&pop_mfr, &pop_id);

	timings->mr = MICRON_V_MR_165;
	/* 128MB DDR */
	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	timings->ctrla = MICRON_V_ACTIMA_200;
	timings->ctrlb = MICRON_V_ACTIMB_200;
	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
}
#endif

/*
 * Routine: tps65910_voltages_init
 * Description: initialize voltages supplied by PMIC
 * On the board we have BOOT0 = 1, BOOT = 0, this defines
 * the voltages supplied by PMIC when power is applied to its
 * input.
 * We only need to set up only VDIG1, VAUX2, VMMC
 */
#define TPS65910_VDIG1_REG	0x30
#define TPS65910_VAUX2_REG	0x33
#define TPS65910_VMMC_REG	0x35
struct vsel_map_t {
	uchar reg_addr;
	uchar vsel;
};

static struct vsel_map_t tps65910_volt[] = {
	{
		.reg_addr = TPS65910_VDIG1_REG,
		/* SEL[1:0] = 10 (1.8 V), ST[1:0] = On high power (ACTIVE) */
		.vsel = 0x9,
	},
	{
		.reg_addr = TPS65910_VAUX2_REG,
		/* SEL[1:0] = 11 (3.3 V), ST[1:0] = On high power (ACTIVE) */
		.vsel = 0xd,
	},
	{
		.reg_addr = TPS65910_VMMC_REG,
		/* SEL[1:0] = 11 (3.3 V), ST[1:0] = On high power (ACTIVE) */
		.vsel = 0xd,
	},
};

static int tps65910_voltages_init(void)
{
	struct vsel_map_t *p = tps65910_volt;
	int i, ret;

	/*
	 * dummy i2c bus access is required to workaround tps65910 errata
	 * "Glitch on SDA-SCL not managed correctly by the I2C IP"
	 */
	i = 2;
	do
		ret = i2c_probe(TPS65910_CTRL_I2C_ADDR);
	while (ret && --i);

	if (ret)
		return -1;

	/* Tell the TPS65910 to use i2c */
	ret = tps65910_set_i2c_control();
	if (ret)
		return ret;

	for (i = 0; i < ARRAY_SIZE(tps65910_volt); i++) {
		ret = i2c_write(TPS65910_CTRL_I2C_ADDR, p->reg_addr, 1, &p->vsel, 1);
		if (ret)
			return ret;
		p++;
	}

	return 0;
}

#define TPS65910_VDIG1_REG	0x30
static int accel_regulator_init(void)
{
	uchar buf;

	if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
		return -1;

	/* Tell the TPS65910 to use i2c */
	tps65910_set_i2c_control();

	/* SEL[1:0] = 1.8 V, ST[1:0] = On high power (ACTIVE) */
	buf = 0x09;

	/* set VDIG1_REG to supply 1.8 V */
	return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_VDIG1_REG, 1, &buf, 1);
}

static struct musb_hdrc_config musb_config = {
	.multipoint     = 1,
	.dyn_fifo       = 1,
	.num_eps        = 16,
	.ram_bits       = 12,
};

static struct omap_musb_board_data musb_board_data = {
	.interface_type	= MUSB_INTERFACE_ULPI,
};

static struct musb_hdrc_platform_data musb_plat = {
#if defined(CONFIG_MUSB_HOST)
	.mode           = MUSB_HOST,
#elif defined(CONFIG_MUSB_GADGET)
	.mode		= MUSB_PERIPHERAL,
#else
#error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET"
#endif
	.config         = &musb_config,
	.power          = 100,
	.platform_ops	= &omap2430_ops,
	.board_data	= &musb_board_data,
};


static void olio_evm_musb_init(void)
{
	printf("musb mode %s \n", musb_plat.mode == MUSB_PERIPHERAL ? "MUSB_PERIPHERAL" : "MUSB_HOST");
	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;

	if (accel_regulator_init())
      puts("failed to set VMMC regulator for tps65910\n");
	if (tps65910_voltages_init())
      puts("failed to initialise tps65910 voltages\n");


	//MUX_BEAGLE_XM();

	dieid_num_r();

	printf("debug usb_data0 %d mode %d \n", CONTROL_PADCONF_HSUSB0_DATA0 , (IEN  | PD | M0));
	gpio_request(USB_CS, "usb_cs");
	gpio_direction_output(USB_CS, 1);

	olio_evm_musb_init();

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_EVM();
}